Seetharaman Ramachandran
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
1999–2003
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | DSD | Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization. | Seetharaman Ramachandran, S. Srinivasan |
| 2001 | FPGA | FPGA implementation of a novel, fast motion estimation algorithm for real-time video compression. | Seetharaman Ramachandran, S. Srinivasan |
| 2000 | ISCAS | A programmable pruning level control based MPEG video encoder. | Seetharaman Ramachandran, S. Srinivasan |
| 2000 | ISCAS | Design and implementation of an EPLD-based variable length coder for real time image compression applications. | Seetharaman Ramachandran, S. Srinivasan |
| 1999 | ISCAS | EPLD-based architecture of real time 2D-discrete cosine transform and quantization for image compression. | Seetharaman Ramachandran, S. Srinivasan, R. Chen |
| 1999 | VLSID | Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs. | D. V. R. Murthy, Seetharaman Ramachandran, S. Srinivasan |