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Shabbir H. Batterywala

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

15

Venues

4

Active years

1997–2015

Best venue rank

A*

Where they publish

Papers

15 indexed papers, newest first.

YearVenueTitleAuthors
2015VLSID2SAT Based Infeasibility Resolution during Design Rule Correction on Layouts with Multiple Grids.Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
2014ASPDACFixing Double Patterning violations with look-ahead.Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir H. Batterywala
2013DACAutomatic design rule correction in presence of multiple grids and track patterns.Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
2009VLSIDEfficient Analog/RF Layout Closure with Compaction Based Legalization.Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
2007VLSIDA 3-dimensional FEM Based Resistance Extraction.Subramanian Rajagopalan, Shabbir H. Batterywala
2007VLSIDImpact of Modern Process Technologies on the Electrical Parameters of Interconnects.Debjit Sinha, Jianfeng Luo, Subramanian Rajagopalan, Shabbir H. Batterywala, Narendra V. Shenoy, Hai Zhou
2006VLSIDMoM - A Process Variation Aware Statistical Capacitance Extractor.Rohit Ananthakrishna, Shabbir H. Batterywala
2006VLSIDA Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills.Shabbir H. Batterywala, Rohit Ananthakrishna, Yansheng Luo, Alex Gyure
2005VLSIDVariance Reduction in Monte Carlo Capacitance Extraction.Shabbir H. Batterywala, Madhav P. Desai
2004VLSIDComputing Silent Gate Models for Noise Analysis from Slew and Delay Tables.Shabbir H. Batterywala, Narendra V. Shenoy
2003VLSIDA Method to Estimate Slew and Delay in Coupled Digital Circuits.Shabbir H. Batterywala, Narendra V. Shenoy
2002ICCADTrack assignment: a desirable intermediate step between global routing and detailed routing.Shabbir H. Batterywala, Narendra V. Shenoy, William Nicholls, Hai Zhou
2001VLSIDSpectral Algorithm To Compute And Synthesize Reduced Order Passive Models For Arbitrary Rc Multiports.Shabbir H. Batterywala, H. Narayanan
1999VLSIDEfficient DC Analysis of RVJ Circuits for Moment and Derivative Commutations of Interconnect Networks.Shabbir H. Batterywala, H. Narayanan
1997VLSIDA New Partitioning Strategy Based on Supermodular Functions.Sachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan