Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
VLSID
/
Paper
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables.
Shabbir H. Batterywala
,
Narendra V. Shenoy
Venue
National
VLSID
Year
2004
Proceedings
VLSI Design
DBLP record
conf/vlsid/BatterywalaS04 ↗
Browse the full
VLSID paper archive
.