Shih-Lien Lu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
38
Venues
18
Active years
1997–2016
Best venue rank
A*
Where they publish
Papers
38 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | IPCCC | Small cache lookaside table for fast DRAM cache access. | Xi Tao, Qi Zeng, Jih-Kwon Peir, Shih-Lien Lu |
| 2016 | PDCAT | Runahead Cache Misses Using Bloom Filter. | Xi Tao, Qi Zeng, Jih-Kwon Peir, Shih-Lien Lu |
| 2015 | ISCA | Flexible auto-refresh: enabling scalable and energy-efficient DRAM refresh reductions. | Ishwar Bhati, Zeshan Chishti, Shih-Lien Lu, Bruce L. Jacob |
| 2015 | MICRO | Improving DRAM latency with dynamic asymmetric subarray. | Shih-Lien Lu, Ying-Chen Lin, Chia-Lin Yang |
| 2014 | HPCA | Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers. | Seth H. Pugsley, Zeshan Chishti, Chris Wilkerson, Peng-fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien Lu, Kingsum Chow, Rajeev Balasubramonian |
| 2014 | HPCC | Remapping NUCA: Improving NUCA Cache's Power Efficiency. | Hui Wang, Chunrong Lai, Yicong Huang, Shih-Lien Lu, Rui Wang, Zhongzhi Luan, Depei Qian |
| 2014 | ICS | Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching. | Jih-Kwon Peir, Shih-Chang Kevin Lai, Shih-Lien Lu, Jared Stark, Konrad Lai |
| 2014 | SC | Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy. | Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun |
| 2013 | HPCA | Technology comparison for large last-level caches (L | Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, Bruce L. Jacob |
| 2013 | ICNP | Guided multiple hashing: Achieving near perfect balance for fast routing lookup. | Xi Tao, Yan Qiao, Jih-Kwon Peir, Shigang Chen, Zhuo Huang, Shih-Lien Lu |
| 2012 | DATE | Design for test and reliability in ultimate CMOS. | Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep P. Kulkarni, Vivek De, Dimiter Avresky |
| 2012 | ICCAD | Scaling the "Memory Wall": Designer track. | Shih-Lien Lu, Tanay Karnik, Ganapati Srinivasa, Kai-Yuan Chao, Doug Carmean, Jim Held |
| 2012 | ISLPED | Reducing L1 caches power by exploiting software semantics. | Zhen Fang, Li Zhao, Xiaowei Jiang, Shih-Lien Lu, Ravi R. Iyer, Tong Li, Seung Eun Lee |
| 2011 | DATE | Distributed hardware matcher framework for SoC survivability. | Ilya Wagner, Shih-Lien Lu |
| 2011 | ISCA | Energy-efficient cache design using variable-strength error-correcting codes. | Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu |
| 2010 | ASPDAC | Resilient design in scaled CMOS for energy efficiency. | James W. Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep P. Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De |
| 2010 | DAC | Automatic multithreaded pipeline synthesis from transactional datapath specifications. | Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam |
| 2010 | DATE | Automatic pipelining from transactional datapath specifications. | Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu |
| 2010 | ISCA | Reducing cache power with low-cost, multi-bit error-correcting codes. | Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu |
| 2010 | ISLPED | Resilient microprocessor design for high performance & energy efficiency. | Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De |
| 2009 | DAC | Circuit techniques for dynamic variation tolerance. | Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar |
| 2009 | ICCAD | Resilient circuits - Enabling energy-efficient performance and reliability. | James W. Tschanz, Keith A. Bowman, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik |
| 2009 | MICRO | Improving cache lifetime reliability at ultra-low voltages. | Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu |
| 2008 | FPL | Novel FPGA based Haar classifier face detection algorithm acceleration. | Changjian Gao, Shih-Lien Lu |
| 2008 | ISCA | Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. | Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu |
| 2007 | FPGA | An FPGA-based Pentium in a complete desktop system. | Shih-Lien Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh |
| 2007 | FPL | An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems. | Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee |
| 2007 | ICCD | Improving the reliability of on-chip data caches under process variations. | Wei Wu, Sheldon X.-D. Tan, Jun Yang, Shih-Lien Lu |
| 2006 | FPGA | Design, implementation, and verification of active cache emulator (ACE). | Jumnit Hong, Eriko Nurvitadhi, Shih-Lien Lu |
| 2005 | ICS | Characterization of L3 cache behavior of SPECjAppServer2002 and TPC-C. | Eriko Nurvitadhi, Nirut Chalainanont, Shih-Lien Lu |
| 2003 | FPL | Implementation of HW$im - A Real-Time Configurable Cache Simulator. | Shih-Lien Lu, Konrad Lai |
| 2003 | ICCD | Hardware-based Pointer Data Prefetcher. | Shih-Chang Lai, Shih-Lien Lu |
| 2002 | DSN | Ditto Processor. | Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir |
| 2002 | ICS | Bloom filtering cache misses for accurate data speculation and prefetching. | Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai |
| 2002 | MICRO | Dynamic addressing memory arrays with physical locality. | Steven Hsu, Shih-Lien Lu, Shih-Chang Lai, Ram Krishnamurthy, Konrad Lai |
| 2000 | MICRO | Performance improvement with circuit-level speculation. | Tong Liu, Shih-Lien Lu |
| 1998 | HPCA | Non-Stalling CounterFlow Architecture. | Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu |
| 1997 | HPCA | Advances of the Counterflow Pipeline Microarchitecture. | Kenneth J. Janik, Shih-Lien Lu, Michael F. Miller |