Shunichi Kato
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1974–1984
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1984 | ITC | Logic Design Verification Using Automated Test Generation. | Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka |
| 1983 | ITC | A High Level Test Pattern Generation Algorithm. | Masato Kawai, Hideo Shibano, Shigehiro Funatsu, Shunichi Kato, T. Kurobe, K. Ookawa, Tohru Sasaki |
| 1981 | DAC | Hierarchical design verification for large digital systems. | Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato |
| 1980 | DAC | MIXS: A mixed level simulator for large digital system logic verification. | Tohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu |
| 1974 | DAC | Microprogramming Design support System. | Akihiko Yamada, Akihiro Kawaguchi, Kazutoshi Takahashi, Shunichi Kato |