| 2020 | FPGA | LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations. | Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong |
| 2020 | IJCNN | Range-Doppler Detection in Automotive Radar with Deep Learning. | Weichong Ng, Guohua Wang, Siddhartha, Zhiping Lin, Bhaskar Jyoti Dutta |
| 2018 | FCCM | Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs. | Siddhartha, Nachiket Kapre |
| 2017 | DATE | eBSP: Managing NoC traffic for BSP workloads on the 16-core Adapteva Epiphany-III processor. | Siddhartha, Nachiket Kapre |
| 2016 | CASES | CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms. | Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Nachiket Kapre |
| 2016 | FCCM | Evaluating Embedded FPGA Accelerators for Deep Learning Applications. | Gopalakrishna Hegde, Siddhartha, Nachiappan Ramasamy, Vamsi Buddha, Nachiket Kapre |
| 2016 | FCCM | Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array. | Nachiket Kapre, Siddhartha |
| 2016 | FPL | Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons. | Sidharth Maheshwari, Gourav Modi, Siddhartha, Nachiket Kapre |
| 2015 | FPGA | FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only). | Siddhartha, Nachiket Kapre |
| 2014 | FCCM | Breaking Sequential Dependencies in FPGA-Based Sparse LU Factorization. | Siddhartha, Nachiket Kapre |
| 2014 | FPL | Heterogeneous dataflow architectures for FPGA-based sparse LU factorization. | Siddhartha, Nachiket Kapre |