Sreekumar V. Kodakara
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
5
Active years
2005–2015
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | VTS | Special session 12B: Panel: IOT - Reliable? Secure? Or death by a billion cuts? | Sreekumar V. Kodakara, Suriya Natarajan |
| 2007 | DATE | Design fault directed test generation for microprocessor validation. | Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar |
| 2007 | VLSID | Model Based Test Generation for Microprocessor Architecture Validation. | Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja |
| 2006 | ASPDAC | Robust analytical gate delay modeling for low voltage circuits. | Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan |
| 2005 | HPCA | Characterizing and Comparing Prevailing Simulation Techniques. | Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag, David J. Lilja, Douglas M. Hawkins |