| 2026 | VTS | Innovative Practices Session: Recent Developments in IEEE Draft Standards P1687, P1687.2, and P2929. | Adam Cron, Stephen K. Sunter, Sankaran Menon, Jeff Rearick, Ilya Wagner, Tapan Chakraborty, Martin Keim |
| 2015 | ITC | Streaming fast access to ADCs and DACs for mixed-signal ATPG. | Stephen K. Sunter, Jean-Francois Cote, Jeff Rearick |
| 2014 | VTS | Innovative practices session 4C: Disruptive solutions in the non-digital world. | Amitava Majumdar, Suriya Natarajan, Stephen K. Sunter, Prashant Goteti, Ke Huang |
| 2014 | VTS | Innovative practices session 7C: Reduced pin-count testing - How low can we go? | Stephen K. Sunter, Steve Comen, Paul Berndt, Ram Rajamani |
| 2012 | DAC | Small delay testing for TSVs in 3-D ICs. | Shi-Yu Huang, Yu-Hsiang Lin, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter, Yung-Fa Chou, Ding-Ming Kwai |
| 2012 | ITC | A unified method for parametric fault characterization of post-bond TSVs. | Yu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter |
| 2011 | ETS | A Mixed-Signal Test Bus and Analog BIST with 'Unlimited' Time and Voltage Resolution. | Stephen K. Sunter, Aubin Roy |
| 2011 | ITC | Adaptive parametric BIST of high-speed parallel I/Os via standard boundary scan. | Stephen K. Sunter, Aubin Roy |
| 2010 | ITC | Experiences with parametric BIST for production testing PLLs with picosecond precision. | Rakesh Kinger, Swetha Narasimhawsamy, Stephen K. Sunter |
| 2010 | ITC | BIST of I/O circuit parameters via standard boundary scan. | Stephen K. Sunter, Matthias Tilmann |
| 2007 | ETS | Purely Digital BIST for Any PLL or DLL. | Stephen K. Sunter, Aubin Roy |
| 2007 | ITC | A selt-testing BOST for high-frequency PLLs, DLLs, and SerDes. | Stephen K. Sunter, Aubin Roy |
| 2006 | ITC | Structural Tests for Jitter Tolerance in SerDes Receivers. | Stephen K. Sunter, Aubin Roy |
| 2005 | ITC | Correct by construction is guaranteed to fail. | Stephen K. Sunter |
| 2005 | ITC | Structural tests for jitter tolerance in SerDes receivers. | Stephen K. Sunter, Aubin Roy |
| 2004 | DATE | Status of IEEE Testability Standards 1149.4, 1532 and 1149.6. | Stephen K. Sunter, Adam Osseiran, Adam Cron, Neil G. Jacobson, Dave Bonnett, Bill Eklow, Carl Barnhart, Ben Bennetts |
| 2004 | ITC | An Automated, Complete, Structural Test Solution for SERDES. | Stephen K. Sunter, Aubin Roy, Jean-Francois Cote |
| 2003 | ITC | Testing High Frequency ADCs and DACs with a Low Frequency Analog Bus. | Stephen K. Sunter |
| 2002 | ITC | High Accuracy Stimulus Generation for A/D Converter BIST. | Aubin Roy, Stephen K. Sunter, Alessandra Fudoli, Davide Appello |
| 2002 | ITC | IC Mixed-Signal BIST: Separating Facts from Fiction. | Stephen K. Sunter |
| 2002 | ITC | Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost. | Stephen K. Sunter, Benoit Nadeau-Dostie |
| 2001 | ITC | A general purpose 1149.4 IC with HF analog test capabilities. | Stephen K. Sunter, Ken Filliter, Joe Woo, Pat McHugh |
| 2001 | ITC | Contactless digital testing of IC pin leakage currents. | Stephen K. Sunter, Charles McDonald, Givargis Danialy |
| 2000 | VTS | How Should Fault Coverage Be Defined? | Thomas W. Williams, Stephen K. Sunter |
| 1999 | ITC | BIST for phase-locked loops in digital applications. | Stephen K. Sunter, Aubin Roy |
| 1999 | VTS | Test Metrics for Analog Parametric Faults. | Stephen K. Sunter, Naveena Nagi |
| 1998 | ITC | BIST vs. ATE: need a different vehicle? | Stephen K. Sunter |
| 1997 | ITC | P1149.4-Problem or Solution for Mixed-Signal IC Design? | Stephen K. Sunter |
| 1997 | ITC | A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST. | Stephen K. Sunter, Naveena Nagi |
| 1996 | ICCD | Design for testability of integrated operational amplifiers using oscillation-test strategy. | Karim Arabi, Bozena Kaminska, Stephen K. Sunter |
| 1995 | ITC | The P1149.4 Mixed Signal Test Bus: Costs and Benefits. | Stephen K. Sunter |
| 1995 | VTS | A low cost 100 MHz analog test bus. | Stephen K. Sunter |