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Stephen W. Keckler

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

102

Venues

19

Active years

1992–2024

Best venue rank

A*

Where they publish

Papers

102 indexed papers, newest first.

YearVenueTitleAuthors
2024HPCAWASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization.Neal Clayton Crago, Sana Damani, Karthikeyan Sankaralingam, Stephen W. Keckler
2024ISCAPrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers.Aamer Jaleel, Gururaj Saileshwar, Stephen W. Keckler, Moinuddin K. Qureshi
2024ISPASSVision Transformer Computation and Resilience for Dynamic Inference.Kavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz
2023IROSVaPr: Variable-Precision Tensors to Accelerate Robot Motion Planning.Yu-Shun Hsiao, Siva Kumar Sastry Hari, Balakumar Sundaralingam, Jason Yik, Thierry Tambe, Charbel Sakr, Stephen W. Keckler, Vijay Janapa Reddi
2023ISCAImplicit Memory Tagging: No-Overhead Memory Safety Using Alias-Free Tagged ECC.Michael B. Sullivan, Mohamed Tarek Ibn Ziad, Aamer Jaleel, Stephen W. Keckler
2023ISPASSCommunity-based Matrix Reordering for Sparse Linear Algebra Optimization.Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Stephen W. Keckler
2022DACZhuyi: perception processing rate estimation for safety in autonomous vehicles.Yu-Shun Hsiao, Siva Kumar Sastry Hari, Michal Filipiuk, Timothy Tsai, Michael B. Sullivan, Vijay Janapa Reddi, Vasu Singh, Stephen W. Keckler
2022DSNExploiting Temporal Data Diversity for Detecting Safety-critical Faults in AV Compute Systems.Saurabh Jha, Shengkun Cui, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew T. Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2022ECCVAugmenting Legacy Networks for Flexible Inference.Jason Clemons, Iuri Frosio, Maying Shen, Jos M. lvarez, Stephen W. Keckler
2022HPCAGPU Subwarp Interleaving.Sana Damani, Mark Stephenson, Ram Rangan, Daniel R. Johnson, Rishkul Kulkami, Stephen W. Keckler
2022HPCASaving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings.Mike O'Connor, Donghyuk Lee, Niladrish Chatterjee, Michael B. Sullivan, Stephen W. Keckler
2021DSNNVBitFI: Dynamic Fault Injection for GPUs.Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Oreste Villa, Stephen W. Keckler
2021DSNSuraksha: A Quantitative AV Safety Evaluation Framework to Analyze Safety Implications of Perception Design Choices.Hengyu Zhao, Siva Kumar Sastry Hari, Timothy Tsai, Michael B. Sullivan, Stephen W. Keckler, Jishen Zhao
2021ISSREOptimizing Selective Protection for CNN Resilience.Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Christopher W. Fletcher, Sarita V. Adve, Charbel Sakr, Naresh R. Shanbhag, Pavlo Molchanov, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2021ISSRESuraksha: A Framework to Analyze the Safety Implications of Perception Design Choices in AVs.Hengyu Zhao, Siva Kumar Sastry Hari, Timothy Tsai, Michael B. Sullivan, Stephen W. Keckler, Jishen Zhao
2021MICROCharacterizing and Mitigating Soft Errors in GPU DRAM.Michael B. Sullivan, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, Stephen W. Keckler
2020CGOSpeculative reconvergence for improved SIMT efficiency.Sana Damani, Daniel R. Johnson, Mark Stephenson, Stephen W. Keckler, Eddie Q. Yan, Michael McKeown, Olivier Giroux
2020ISCABuddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs.Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler
2019ASPLOSBuffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration.Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer
2019DSNML-Based Fault Injection for Autonomous Vehicles: A Case for Bayesian Fault Injection.Saurabh Jha, Subho S. Banerjee, Timothy Tsai, Siva Kumar Sastry Hari, Michael B. Sullivan, Zbigniew T. Kalbarczyk, Stephen W. Keckler, Ravishankar K. Iyer
2019DSNOn the Trend of Resilience for GPU-Dense Systems.Kyushick Lee, Michael B. Sullivan, Siva Kumar Sastry Hari, Timothy Tsai, Stephen W. Keckler, Mattan Erez
2019ICCADMAGNet: A Modular Accelerator Generator for Neural Networks.Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2019ICSGPU snapshot: checkpoint offloading for GPU-dense systems.Kyushick Lee, Michael B. Sullivan, Siva Kumar Sastry Hari, Timothy Tsai, Stephen W. Keckler, Mattan Erez
2019ISPASSTimeloop: A Systematic Approach to DNN Accelerator Evaluation.Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer
2019MICROSimba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2019MICRONVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs.Oreste Villa, Mark Stephenson, David W. Nellans, Stephen W. Keckler
2018HPCACompressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks.Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, Stephen W. Keckler
2018MICROSwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection.Michael B. Sullivan, Siva Kumar Sastry Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
2018SCOptimizing software-directed instruction replication for GPU error detection.Abdulrahman Mahmoud, Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Stephen W. Keckler
2017HPCAArchitecting an Energy-Efficient DRAM System for GPUs.Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally
2017ISCASCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks.Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally
2017ISPASSSASSIFI: An architecture-level fault injection tool for GPU application resilience evaluation.Siva Kumar Sastry Hari, Timothy Tsai, Mark Stephenson, Stephen W. Keckler, Joel S. Emer
2017MICROFine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems.Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally
2017SCUnderstanding error propagation in deep learning neural network (DNN) accelerators and applications.Guanpeng Li, Siva Kumar Sastry Hari, Michael B. Sullivan, Timothy Tsai, Karthik Pattabiraman, Joel S. Emer, Stephen W. Keckler
2016DACA real-time energy-efficient superpixel hardware accelerator for mobile computer vision applications.Injoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler
2016HPCASelective GPU caches to eliminate CPU-GPU HW cache coherence.Neha Agarwal, David W. Nellans, Eiman Ebrahimi, Thomas F. Wenisch, John Danskin, Stephen W. Keckler
2016HPCAA case for toggle-aware compression for GPU systems.Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler
2016HPCATowards high performance paged memory for GPUs.Tianhao Zheng, David W. Nellans, Arslan Zulfiqar, Mark Stephenson, Stephen W. Keckler
2016ISCATransparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems.Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler
2016MICROA patch memory system for image processing and computer vision.Jason Clemons, Chih-Chi Cheng, Iuri Frosio, Daniel R. Johnson, Stephen W. Keckler
2016MICROvDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design.Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Stephen W. Keckler
2015ASPLOSPage Placement Strategies for GPUs within Heterogeneous Memory Systems.Neha Agarwal, David W. Nellans, Mark Stephenson, Mike O'Connor, Stephen W. Keckler
2015HPCAUnlocking bandwidth for GPUs in CC-NUMA systems.Neha Agarwal, David W. Nellans, Mike O'Connor, Stephen W. Keckler, Thomas F. Wenisch
2015ISCAA variable warp size architecture.Timothy G. Rogers, Daniel R. Johnson, Mike O'Connor, Stephen W. Keckler
2015ISCAFlexible software profiling of GPU architectures.Mark Stephenson, Siva Kumar Sastry Hari, Yunsup Lee, Eiman Ebrahimi, Daniel R. Johnson, David W. Nellans, Mike O'Connor, Stephen W. Keckler
2014ASPLOSApplication-aware Memory System for Fair and Efficient Execution of Concurrent GPGPU Applications.Adwait Jog, Evgeny Bolotin, Zvika Guz, Mike Parker, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das
2014ICSAuthor retrospective for a NUCA substrate for flexible CMP cache sharing.Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler
2014MICROArbitrary Modulus Indexing.Jeffrey R. Diamond, Donald S. Fussell, Stephen W. Keckler
2014MICROExploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures.Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic
2014SCScaling the Power Wall: A Path to Exascale.Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally
2013CGOConvergence and scalarization for data-parallel architectures.Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic
2013DAC21st century digital design tools.William J. Dally, Chris Malachowsky, Stephen W. Keckler
2013HPCAHow to implement effective prediction and forwarding for fusable dynamic multicore architectures.Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam, Doug Burger, Stephen W. Keckler
2012ICCDExploiting microarchitectural redundancy for defect tolerance.Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2012MICROUnifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor.Mark Gebhart, Stephen W. Keckler, Brucek Khailany, Ronny Krashinsky, William J. Dally
2011HPCAExploiting criticality to reduce bottlenecks in distributed uniprocessors.Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler
2011ISCAEnergy-efficient mechanisms for managing thread context in throughput processors.Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron
2011ISCAKilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees.Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu
2011ISPASSEvaluation and optimization of multicore performance bottlenecks in supercomputing applications.Jeffrey R. Diamond, Martin Burtscher, John D. McCalpin, Byoung-Do Kim, Stephen W. Keckler, James C. Browne
2011MICROA compile-time managed multi-level register file hierarchy.Mark Gebhart, Stephen W. Keckler, William J. Dally
2010ISCATopology-Aware Quality-of-Service Support in Highly Integrated Chip Multiprocessors.Boris Grot, Stephen W. Keckler, Onur Mutlu
2010MICRONetrace: dependency-driven trace-based network-on-chip simulation.Joel Hestness, Boris Grot, Stephen W. Keckler
2009ASPLOSAn evaluation of the TRIPS computer system.Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley
2009HPCAExpress Cube Topologies for on-Chip Interconnects.Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu
2009ISLPEDEnd-to-end validation of architectural power models.Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger
2009ISPASSAnalysis of the TRIPS prototype block predictor.Nitya Ranganathan, Doug Burger, Stephen W. Keckler
2009MICROPreemptive virtual clock: a flexible, efficient, and cost-effective QOS scheme for networks-on-chip.Boris Grot, Stephen W. Keckler, Onur Mutlu
2009MICROSegment gating for static energy reduction in Networks-on-Chip.Kyle C. Hale, Boris Grot, Stephen W. Keckler
2008HPCARegional congestion awareness for load balance in networks-on-chip.Paul Gratz, Boris Grot, Stephen W. Keckler
2008ISCACounting Dependence Predictors.Franziska Roesner, Doug Burger, Stephen W. Keckler
2008PPoPPHigh performance dense linear algebra on a spatially distributed processor.Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger
2007CLUSTERThe future of multi-core technologies.Michael T. Clark, H. Peter Hofstee, Edward J. Barragy, Ian Buck, Stephen W. Keckler
2007ISCALate-binding: enabling unordered load-store queues.Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler
2007ISLPEDThermal response to DVFS: analysis with an Intel Pentium M.Heather Hanson, Stephen W. Keckler, Soraya Ghiasi, Karthick Rajamani, Freeman L. Rawson III, Juan Rubio
2007MICROComposable Lightweight Processors.Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler
2007SIGCOMMReconciling performance and programmability in networking systems.Jayaram Mudigonda, Harrick M. Vin, Stephen W. Keckler
2006ICCDImplementation and Evaluation of On-Chip Network Architectures.Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger
2006ICCDDesign and Implementation of the TRIPS Primary Memory System.Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler
2006ISPASSCritical path analysis of the TRIPS architecture.Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler
2006MICRODistributed Microarchitectural Protocols in the TRIPS Prototype Processor.Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
2006MICRODataflow Predication.Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley
2005ICSA NUCA substrate for flexible CMP cache sharing.Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler
2004ASPLOSScalable selective re-execution for EDGE architectures.Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler
2003ICCDRouted Inter-ALU Networks for ILP Scalability and Performance.Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger
2003ICCDExploiting Microarchitectural Redundancy For Defect Tolerance.Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003ISCAExploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture.Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
2003ISLPEDMicroprocessor pipeline energy analysis.Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger
2003MICROUniversal Mechanisms for Data-Parallel Architectures.Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger
2003MICROScalable Hardware Memory Disambiguation for High ILP Processors.Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
2002ASPLOSAn adaptive, non-uniform cache structure for wire-delay dominated on-chip caches.Changkyu Kim, Doug Burger, Stephen W. Keckler
2002DSNModeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic.Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi
2002ISCAThe Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays.M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas
2001ICCDStatic Energy Reduction Techniques for Microprocessor Caches.Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger
2001ISCAMeasuring Experimental Error in Microprocessor Simulation.Rajagopalan Desikan, Doug Burger, Stephen W. Keckler
2001MICROA design space evaluation of grid processor architectures.Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler
2000ISCAClock rate versus IPC: the end of the road for conventional microarchitectures.Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger
2000MICROThe impact of delay on the design of branch predictors.Daniel A. Jimnez, Stephen W. Keckler, Calvin Lin
1998ICCDThe effects of explicitly parallel mechanisms on the multi-ALU processor cluster pipeline.Andrew Chang, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Whay Sing Lee
1998ISCAExploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor.Stephen W. Keckler, William J. Dally, Daniel Maskit, Nicholas P. Carter, Andrew Chang, Whay Sing Lee
1995MICROThe M-Machine multicomputer.Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay Sing Lee
1994ASPLOSHardware Support for Fast Capability-based Addressing.Nicholas P. Carter, Stephen W. Keckler, William J. Dally
1992ISCAProcessor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism.Stephen W. Keckler, William J. Dally