Stphane Donnay
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
23
Venues
7
Active years
1995–2007
Best venue rank
A*
Where they publish
Papers
23 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ISCAS | Scalable Gate-Level Models for Power and Timing Analysis. | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2005 | DATE | Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. | Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stphane Donnay |
| 2004 | DAC | High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. | Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovoln, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2004 | DATE | Digital Ground Bounce Reduction by Phase Modulation of the Clock. | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2004 | DATE | Extended Subspace Identification of Improper Linear Systems. | Gerd Vandersteen, Rik Pintelon, Dimitri Linten, Stphane Donnay |
| 2004 | ICASSP | Compensation of transmitter IQ imbalance for OFDM systems. | Jan Tubbax, Boris Come, Liesbet Van der Perre, Stphane Donnay, Marc Moonen, Hugo De Man |
| 2003 | DAC | 4G terminals: how are we going to design them? | Jan Craninckx, Stphane Donnay |
| 2003 | DATE | Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits. | Petr Dobrovoln, Gerd Vandersteen, Piet Wambacq, Stphane Donnay |
| 2003 | DATE | Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver. | Wolfgang Eberle, Gerd Vandersteen, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2003 | GLOBECOM | Joint compensation of IQ imbalance and frequency offset in OFDM systems. | Jan Tubbax, Andrew Fort, Liesbet Van der Perre, Stphane Donnay, Marc Engels, Marc Moonen, Hugo De Man |
| 2002 | DAC | Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. | Mustafa Badaroglu, Kris Tiri, Stphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen |
| 2002 | DATE | Analysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach . | Michal Goffioul, Piet Wambacq, Gerd Vandersteen, Stphane Donnay |
| 2002 | DATE | High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions. | Gerd Vandersteen, Piet Wambacq, Stphane Donnay, Frans Verbeyst |
| 2001 | DATE | High-level simulation of substrate noise generation from large digital circuits with multiple supplies. | Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens |
| 2001 | DATE | Efficient bit-error-rate estimation of multicarrier transceivers. | Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stphane Donnay, Marc Engels, Ivo Bolsens |
| 2001 | VTC | OFDM versus Single Carrier with Cyclic Prefix: a system-based comparison. | Jan Tubbax, Boris Come, Liesbet Van der Perre, Luc Deneire, Stphane Donnay, Marc Engels |
| 2000 | DAC | High-level simulation of substrate noise generation including power supply noise coupling. | Marc van Heijningen, Mustafa Badaroglu, Stphane Donnay, Marc Engels, Ivo Bolsens |
| 2000 | DAC | A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. | Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens |
| 2000 | DATE | Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. | Piet Wambacq, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens |
| 1999 | DATE | A Single-Package Solution for Wireless Transceivers. | Piet Wambacq, Stphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens |
| 1998 | DATE | Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. | Jan Vandenbussche, Stphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen |
| 1997 | DATE | High-level synthesis of analog sensor interface front-ends. | Stphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven |
| 1995 | ICCAD | A high-level design and optimization tool for analog RF receiver front-ends. | Jan Crols, Stphane Donnay, Michiel Steyaert, Georges G. E. Gielen |