| 2025 | ISCAS | An in-memory computing circuit with carry-over thermometer coding for a hippocampus-inspired model. | Yuka Shishido, Tomoro Marcus Jones, Hakaru Tamukoh, Takashi Morie |
| 2024 | IJCNN | Robust Binary Encoding for Ternary Neural Networks Toward Deployment on Emerging Memory. | Ninnart Fuengfusin, Hakaru Tamukoh, Osamu Nomura, Takashi Morie |
| 2024 | IJCNN | A Hippocampus-Inspired Environment-Specific Knowledge Acquisition System Utilizing Common Knowledge with Contextual Information. | Akinobu Mizutani, Yuichiro Tanaka, Hakaru Tamukoh, Osamu Nomura, Katsumi Tateno, Takashi Morie |
| 2024 | IJCNN | CMOS digital-analog mixed signal VLSI implementation of a hippocampus-inspired model. | Yuka Shishido, Osamu Nomura, Katsumi Tateno, Hakaru Tamukoh, Takashi Morie |
| 2024 | ISCAS | Enhancing Memory Capacity of Reservoir Computing with Delayed Input and Efficient Hardware Implementation with Shift Registers. | Soshi Hirayae, Kanta Yoshioka, Atsuki Yokota, Ichiro Kawashima, Yuichiro Tanaka, Yuichi Katori, Osamu Nomura, Takashi Morie, Hakaru Tamukoh |
| 2024 | RoboCup | Hibikino-Musashi@Home RoboCup@Home DSPL Champion 2024. | Akinobu Mizutani, Kosei Isomoto, Kosei Yamao, Ryohei Kobayashi, Soma Fumoto, Koshun Arimura, Naoki Yamaguchi, Tomoya Shiba, Kouki Kimizuka, Yuta Ohno, Ryo Terashima, Hiromasa Yamaguchi, Tomoaki Fujino, Ryoga Maruno, Wataru Yoshimura, Kazuhito Mine, Tang Phu Thien Nhan, Yuga Yano, Yuichiro Tanaka, Takeshi Nishida, Takashi Morie, Hakaru Tamukoh |
| 2023 | IJCNN | Efficient Repetition Coding for Deep Learning Towards Implementation Using Emerging Non-Volatile Memory with Write-Errors. | Ninnart Fuengfusin, Hakaru Tamukoh, Yuichiro Tanaka, Osamu Nomura, Takashi Morie |
| 2023 | IJCNN | FPGA Implementation of a Chaotic Boltzmann Machine Annealer. | Kanta Yoshioka, Yuichi Katori, Yuichiro Tanaka, Osamu Nomura, Takashi Morie, Hakaru Tamukoh |
| 2022 | ISCAS | A memory-based entorhinal-hippocampal model and its FPGA implementation by on-chip RAMs. | Ichiro Kawashima, Katsumi Tateno, Takashi Morie, Hakaru Tamukoh |
| 2022 | ISCAS | A Spiking Neural Network with Resistively Coupled Synapses Using Time-to-First-Spike Coding Towards Efficient Charge-Domain Computing. | Yusuke Sakemi, Kai Morino, Takashi Morie, Takeo Hosomi, Kazuyuki Aihara |
| 2019 | IJCNN | Reservoir Computing Based on Dynamics of Pseudo-Billiard System in Hypercube. | Yuichi Katori, Hakaru Tamukoh, Takashi Morie |
| 2019 | IJCNN | A Chaotic Boltzmann Machine Working as a Reservoir and Its Analog VLSI Implementation. | Masatoshi Yamaguchi, Yuichi Katori, Daichi Kamimura, Hakaru Tamukoh, Takashi Morie |
| 2019 | ISCAS | Live Demonstration: A VLSI Implementation of Time-Domain Analog Weighted-Sum Calculation Model for Intelligent Processing on Robots. | Masatoshi Yamaguchi, Gouki Iwamoto, Yushi Abe, Yuichiro Tanaka, Yutaro Ishida, Hakaru Tamukoh, Takashi Morie |
| 2018 | ISCAS | Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots. | Yutaro Ishida, Takashi Morie, Hakaru Tamukoh |
| 2018 | ISCAS | A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots. | Yutaro Ishida, Takashi Morie, Hakaru Tamukoh |
| 2017 | ICONIP | A Hardware-Oriented Dropout Algorithm for Efficient FPGA Implementation. | Yoeng Jye Yeoh, Takashi Morie, Hakaru Tamukoh |
| 2017 | IJCNN | A CMOS chaotic Boltzmann machine circuit and three-neuron network operation. | Masatoshi Yamaguchi, Hakaru Tamukoh, Hideyuki Suzuki, Takashi Morie |
| 2016 | ICANN | Restricted Boltzmann Machines Without Random Number Generators for Efficient Digital Hardware Implementation. | Sansei Hori, Takashi Morie, Hakaru Tamukoh |
| 2016 | ICONIP | FPGA Implementation of Autoencoders Having Shared Synapse Architecture. | Akihiro Suzuki, Takashi Morie, Hakaru Tamukoh |
| 2016 | ICONIP | Time-Domain Weighted-Sum Calculation for Ultimately Low Power VLSI Neural Networks. | Quan Wang, Hakaru Tamukoh, Takashi Morie |
| 2016 | ICONIP | A CMOS Unit Circuit Using Subthreshold Operation of MOSFETs for Chaotic Boltzmann Machines. | Masatoshi Yamaguchi, Takashi Kato, Quan Wang, Hideyuki Suzuki, Hakaru Tamukoh, Takashi Morie |
| 2014 | ASPDAC | A silicon nanodisk array structure realizing synaptic response of spiking neuron models with noise. | Takashi Morie, Haichao Liang, Yilai Sun, Takashi Tohara, Makoto Igarashi, Seiji Samukawa |
| 2014 | ICONIP | Morphological Associative Memory Employing a Split Store Method. | Hakaru Tamukoh, Kensuke Koga, Hideaki Harada, Takashi Morie |
| 2013 | ICONIP | Parameterized Digital Hardware Design of Pulse-Coupled Phase Oscillator Model toward Spike-Based Computing. | Yasuhiro Suedomi, Hakaru Tamukoh, Michio Tanaka, Kenji Matsuzaka, Takashi Morie |
| 2012 | ACCV | Obstacles Extraction Using a Moving Camera. | Shaohua Qian, Joo Kooi Tan, Hyoungseop Kim, Seiji Ishikawa, Takashi Morie |
| 2011 | ICONIP | A VLSI Spiking Neural Network with Symmetric STDP and Associative Memory Operation. | Frank L. Maldonado Huayaney, Hideki Tanaka, Takayuki Matsuo, Takashi Morie, Kazuyuki Aihara |
| 2011 | ICONIP | A Motion Detection Model Inspired by Hippocampal Function and Its FPGA Implementation. | Haichao Liang, Takashi Morie |
| 2011 | ISCAS | Analog CMOS circuit implementation of a system of pulse-coupled oscillators for spike-based computation. | Kenji Matsuzaka, Kazuki Nakada, Takashi Morie |
| 2010 | ISCAS | A 2-dimensional Si nanodisk array structure for spiking neuron models. | Takashi Morie, Yilai Sun, Haichao Liang, Makoto Igarashi, Chi-Hsien Huang, Seiji Samukawa |
| 2009 | ASPDAC | Design methods for pipeline & delta-sigma A-to-D converters with convex optimization. | Kazuo Matsukawa, Takashi Morie, Yusuke Tokunaga, Shiro Sakiyama, Yosuke Mitani, Masao Takayama, Takuji Miki, Akinori Matsumoto, Koji Obata, Shiro Dosho |
| 2009 | IJCNN | Coarse image region segmentation using region-and boundary-based coupled MRF models and their PWM VLSI implementation. | Yusuke Kawashima, Daisuke Atuti, Kazuki Nakada, Masato Okada, Takashi Morie |
| 2009 | SMC | Video Monitoring of Slope Failure Using Spatiotemporal Gabor Filtering. | Ken Okamoto, Toshio Watanabe, Akitoshi Hanazawa, Takashi Morie, Hiroshi Ban, Yuji Maeda |
| 2008 | ISCAS | CMOS pulse-modulation circuit implementation of phase-locked loop neural networks. | Daisuke Atuti, Kazuki Nakada, Takashi Morie |
| 2008 | SMC | Face and arm-posture recognition for secure human-machine interaction. | Ishtiaq Rasool Khan, Hiroyuki Miyamoto, Takashi Morie |
| 2007 | HIS | An FPGA-based CollisionWarning System Using Hybrid Approach. | Haichao Liang, Takashi Morie, Youhei Suzuki, Kazuki Nakada, Tsutomu Miki, Hatsuo Hayashi |
| 2007 | ICONIP | Projection-Field-Type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach. | Osamu Nomura, Takashi Morie |
| 2005 | ICNC | A Convolutional Neural Network VLSI Architecture Using Sorting Model for Reducing Multiply-and-Accumulation Operations. | Osamu Nomura, Takashi Morie, Masakazu Matsugu, Atsushi Iwata |
| 2005 | IJCNN | A digital LSI architecture of elastic graph matching and its FPGA implementation. | Teppei Nakano, Takashi Morie |
| 2005 | ISCAS | A pixel-parallel anisotropic diffusion algorithm for subjective contour generation. | Youngjae Kim, Takashi Morie |
| 2004 | KES | A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition. | Osamu Nomura, Takashi Morie, Keisuke Korekado, Masakazu Matsugu, Atsushi Iwata |
| 2003 | KES | A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture. | Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata |
| 2002 | VLSID | Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models. | Makoto Nagata, Yoshitaka Murasaka, Youichi Nishimori, Takashi Morie, Atsushi Iwata |
| 2001 | ASPDAC | Test circuits for substrate noise evaluation in CMOS digital ICs. | Makoto Nagata, Takafumi Ohmoto, Jin Nagai, Takashi Morie, Atsushi Iwata |
| 2000 | ASPDAC | An arbitrary chaos generator core curcuit using PWM/PPM signals. | Kenichi Murakoshi, Takashi Morie, Makoto Nagata, Atsushi Iwata |
| 2000 | ASPDAC | A smart imager for the vision processing front-END. | Noriaki Takeda, Mitsuru Homma, Makoto Nagata, Takashi Morie, Atsushi Iwata |
| 2000 | ISCAS | Pulse modulation circuit architecture and its application to functional image sensors. | Atsushi Iwata, Makoto Nagata, Noriaki Takeda, Mitsuru Homma, Takashi Morie |
| 1998 | ICONIP | Oscillator Networks for Image Segmentation and Their Circuits Using Pulse Modulation Method. | Hiroshi Ando, Takashi Morie, Makoto Nagata, Atsushi Iwata |
| 1998 | ICONIP | Nonlinear Function Generators and Chaotic Signal Generators Based on Pulse-Phase Modulation. | Souta Sakabayashi, Takashi Morie, Makoto Nagata, Atsushi Iwata |