| 2023 | SAC | An Efficient Feature-based Method for People Counting. | Daniel Helmer, Heiko Hinkelmann, Thomas Hollstein |
| 2021 | DATE | Triple Fixed-Point MAC Unit for Deep Learning. | Madis Kerner, Kalle Tammeme, Jaan Raik, Thomas Hollstein |
| 2021 | ISCAS | Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs. | Cesar G. Chaves, Johanna Seplveda, Thomas Hollstein |
| 2020 | FCCM | An Efficient FPGA-based Architecture for Contractive Autoencoders. | Madis Kerner, Kalle Tammeme, Jaan Raik, Thomas Hollstein |
| 2018 | DDECS | Software-Level TMR Approach for On-Board Data Processing in Space Applications. | Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Grschwin Fey |
| 2017 | DDECS | From online fault detection to fault management in Network-on-Chips: A ground-up approach. | Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Stephen Adeboye Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein |
| 2017 | ETS | Automated area and coverage optimization of minimal latency checkers. | Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein |
| 2017 | ISCAS | Comprehensive performance and robustness analysis of 2D turn models for network-on-chips. | Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Thilo Kogge, Jaan Raik, Gert Jervan, Thomas Hollstein |
| 2015 | DDECS | NoCDepend: A Flexible and Scalable Dependability Technique for 3D Networks-on-Chip. | Thomas Hollstein, Siavoosh Payandeh Azad, Thilo Kogge, Haoyuan Ying, Klaus Hofmann |
| 2015 | DSD | A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers. | Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Ranganathan Hariharan, Gert Jervan, Thomas Hollstein |
| 2013 | DATE | Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems. | Haoyuan Ying, Thomas Hollstein, Klaus Hofmann |
| 2012 | DDECS | A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. | Haoyuan Ying, Ashok Jaiswal, Mohamed A. Abd El-Ghany, Thomas Hollstein, Klaus Hofmann |
| 2011 | DSD | A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. | Haoyuan Ying, Ashok Jaiswal, Thomas Hollstein, Klaus Hofmann |
| 2008 | DATE | Multicast Parallel Pipeline Router Architecture for Network-on-Chip. | Faizal Arya Samman, Thomas Hollstein, Manfred Glesner |
| 2005 | ICCAD | Deadlock-free routing and component placement for irregular mesh-based networks-on-chip. | Martin K. F. Schafer, Thomas Hollstein, Heiko Zimmer, Manfred Glesner |
| 2004 | RSP | Rapid Prototyping of an Integrated Testing and Debugging Unit. | Ralf Ludewig, Thomas Hollstein, Falko Schtz, Manfred Glesner |
| 2003 | FPL | Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. | Tudor Murgan, Mihail Petrov, Alberto Garca Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard lkrug, Jrg Brakensiek |
| 2002 | DSD | Integrated Design and Test Generation Under Internet Based Environment MOSCITO. | Andr Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatov, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng |
| 1998 | DATE | From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms. | Claus Schneider, Martin Kayss, Thomas Hollstein, Jrgen Deicke |
| 1997 | FPL | A prototyping environment for fuzzy controllers. | Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner |
| 1995 | FPL | Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. | U. Zahm, Thomas Hollstein, Hans-Jrgen Herpel, Norbert Wehn, Manfred Glesner |