Thomas W. Williams
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
37
Venues
9
Active years
1977–2008
Best venue rank
A*
Where they publish
Papers
37 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ASPDAC | Reaching the limits of low power design. | J. S. Hobbs, Thomas W. Williams |
| 2008 | ETS | The Future Is Low Power and Test. | Thomas W. Williams |
| 2007 | DDECS | Accurately Determining Bridging Defects from Layout. | Maria Gkatziani, Rohit Kapur, Qing Su, Ben Mathew, Roberto Mattiuzzo, Laura Tarantini, Cy Hay, Salvatore Talluto, Thomas W. Williams |
| 2007 | ITC | Fundamentals of timing information for test: How simple can we get? | Rohit Kapur, Jindrich Zejda, Thomas W. Williams |
| 2007 | VTS | Minimizing the Impact of Scan Compression. | Peter Wohl, John A. Waicukauski, Rohit Kapur, Sanjay Ramnath, Emil Gizdarski, Thomas W. Williams, P. Jaini |
| 2005 | ITC | Efficient compression of deterministic patterns into multiple PRPG seeds. | Peter Wohl, John A. Waicukauski, Sanjay Patel, Francisco DaSilva, Thomas W. Williams, Rohit Kapur |
| 2004 | VTS | Changing the Scan Enable during Shift. | Nodari Sitchinava, Samitha Samaranayake, Rohit Kapur, Emil Gizdarski, Frederic Neuveux, Thomas W. Williams |
| 2003 | DATE | Test Pattern Compression Using Prelude Vectors in Fan-Out Scan Chain with Feedback Architecture. | Nahmsuk Oh, Rohit Kapur, Thomas W. Williams, Jim Sproch |
| 2003 | ITC | Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. | Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir |
| 2003 | VTS | A Reconfigurable Shared Scan-in Architecture. | Samitha Samaranayake, Emil Gizdarski, Nodari Sitchinava, Frederic Neuveux, Rohit Kapur, Thomas W. Williams |
| 2002 | DAC | Enhancing test efficiency for delay fault testing using multiple-clocked schemes. | Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams |
| 2002 | DATE | Directed-Binary Search in Logic BIST Diagnostics. | Rohit Kapur, Thomas W. Williams, M. Ray Mercer |
| 2002 | ICCAD | Fast seed computation for reseeding shift register in test pattern compression. | Nahmsuk Oh, Rohit Kapur, Thomas W. Williams |
| 2002 | ITC | Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. | Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams |
| 2001 | ITC | Tester retargetable patterns. | Rohit Kapur, Thomas W. Williams |
| 2001 | ITC | A new methodology for improved tester utilization. | Ajay Khoche, Rohit Kapur, David Armstrong, Thomas W. Williams, Mick Tegethoff, Jochen Rivoir |
| 2001 | ITC | Design of compactors for signature-analyzers in built-in self-test. | Peter Wohl, John A. Waicukauski, Thomas W. Williams |
| 2000 | VTS | How Should Fault Coverage Be Defined? | Thomas W. Williams, Stephen K. Sunter |
| 1999 | DATE | Testing in Nanometer Technologies. | Thomas W. Williams |
| 1996 | DATE | Iddq Testing for High Performance CMOS - The Next Ten Years. | Thomas W. Williams, Rohit Kapur, M. Ray Mercer, Robert H. Dennard, Wojciech Maly |
| 1996 | ICCD | A Better ATPG Algorithm and Its Design Principles. | Li-C. Wang, M. Ray Mercer, Thomas W. Williams |
| 1996 | ITC | Using Target Faults To Detect Non-Tartget Defects. | Li-C. Wang, M. Ray Mercer, Thomas W. Williams |
| 1996 | ITC | I | Thomas W. Williams, Robert H. Dennard, Rohit Kapur, M. Ray Mercer, Wojciech Maly |
| 1995 | DATE | Enhanced testing performance via unbiased test sets. | Li-C. Wang, M. Ray Mercer, Thomas W. Williams |
| 1995 | ITC | On Efficiently and Reliably Achieving Low Defective Part Levels. | Li-C. Wang, M. Ray Mercer, Thomas W. Williams |
| 1995 | VTS | On the decline of testing efficiency as fault coverage approaches 100%. | Li-C. Wang, M. Ray Mercer, Sophia W. Kao, Thomas W. Williams |
| 1994 | ITC | Design of an Efficient Weighted-Random-Pattern Generation System. | Rohit Kapur, Srinivas Patil, Thomas J. Snethen, Thomas W. Williams |
| 1994 | VTS | Limitations in predicting defect level based on stuck-at fault coverage. | Jaehong Park, Mark Naivar, Rohit Kapur, M. Ray Mercer, Thomas W. Williams |
| 1993 | ICCD | Design for Testability: Today and in the Future. | Thomas W. Williams |
| 1991 | DAC | The Interdependence Between Delay-Optimization of Synthesized Networks and Testing. | Thomas W. Williams, Bill Underwood, M. Ray Mercer |
| 1991 | ITC | Delay Testing Quality in Timing-Optimized Designs. | Eun Sei Park, Bill Underwood, Thomas W. Williams, M. Ray Mercer |
| 1991 | ITC | Enhancing Board Functional Self-Test by Concurrent Sampling. | Kenneth D. Wagner, Thomas W. Williams |
| 1988 | ITC | Statistical Delay Fault Coverage and Defect Level for Delay Faults. | Eun Sei Park, Thomas W. Williams, M. Ray Mercer |
| 1988 | ITC | Design for Testability of Mixed Signal Integrated Circuits. | Kenneth D. Wagner, Thomas W. Williams |
| 1982 | DAC | Design for testability. | Thomas W. Williams |
| 1982 | ITC | Analysis of the Switching Behavior of Combinatorial Logic Networks. | Eugen I. Muehldorf, Thomas W. Williams |
| 1977 | DAC | A logic design structure for LSI testability. | Edward B. Eichelberger, Thomas W. Williams |