| 2018 | DATE | Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. | Arne Heittmann, Tobias G. Noll |
| 2015 | INDIN | On the use of analytical techniques for reliability analysis in presence of hardware-induced errors. | Georgia Psychou, Tobias Gemmeke, Tobias G. Noll |
| 2014 | ISCAS | Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit. | Arne Heittmann, Tobias G. Noll |
| 2014 | VLSID | Statistical Modeling of Glitching Effects in Estimation of Dynamic Power Consumption. | Michael Meixner, Tobias G. Noll |
| 2013 | ASPDAC | Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation. | Arne Heittmann, Tobias G. Noll |
| 2013 | DATE | High-level modeling and synthesis for embedded FPGAs. | Xiaolin Chen, Shuai Li, Jochen Schleifer, Thomas Coenen, Anupam Chattopadhyay, Gerd Ascheid, Tobias G. Noll |
| 2012 | ESANN | A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights. | Arne Heittmann, Tobias G. Noll |
| 2010 | ISCAS | A radix-4 single-precision floating point divider based on digit set interleaving. | Ingo Rust, Tobias G. Noll |
| 2008 | DATE | Design flow for embedded FPGAs based on a flexible architecture template. | Bernd Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll |
| 2008 | FPL | Application-specific reconfigurable processors. | Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Gtz Kappen, Tobias G. Noll |
| 2008 | MMSP | Design of a Pareto-optimization environment and its application to motion estimation. | Jrg von Livonius, Holger Blume, Tobias G. Noll |
| 2007 | FPL | A Power Estimation Model for an FPGA-based Softcore Processor. | Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume, Tobias G. Noll |
| 2006 | DATE | Application specific instruction processor based implementation of a GNSS receiver on an FPGA. | Gtz Kappen, Tobias G. Noll |
| 2006 | DATE | Cross disciplinary aspects (4G wireless special day). | Tobias G. Noll, Uwe Lambrette |
| 2005 | ICASSP | A parametrizable low-power high-throughput turbo-decoder. | Gordian Prescher, Tobias Gemmeke, Tobias G. Noll |
| 2005 | ISCAS | Error-tolerant FIR filters based on low-cost residue codes. | Jos L. Rodrguez-Navarro, Michael Gansen, Tobias G. Noll |
| 2004 | VCIP | Segmentation in the loop: an iterative object-based algorithm for motion estimation. | Holger Blume, Jrg von Livonius, Tobias G. Noll |
| 1998 | ICASSP | A hybrid equalizer merging the advantages of Baud spaced and fractionally spaced equalizers. | Christian Ltkemeyer, Hans-Martin Blthgen, Tobias G. Noll |
| 1997 | ICASSP | A novel systematic mapping approach for highly efficient multiplexed FIR-filter architectures. | Wolfgang Wilhelm, Tobias G. Noll |
| 1994 | DAC | Low Power CMOS Design Strategies. | Matthias Schbinger, Tobias G. Noll |
| 1994 | ISCAS | A 60-MBaud Single-Chip QAM-Processor for the Complete Base-Band Signal Processing of QAM Demodulators. | Erik De Man, Matthias Schbinger, Tobias G. Noll, Georg Sebald |
| 1990 | ICASSP | CMOS VLSI implementation of the 2D-DCT with linear processor arrays. | U. Totzek, F. Matthiesen, S. Wohlleben, Tobias G. Noll |
| 1989 | ICASSP | VLSI architectures for the full-search blockmatching algorithm. | Luc de Vos, M. Stegherr, Tobias G. Noll |
| 1984 | ICASSP | A dynamic time warp IC for a one thousand word recognition system. | Robert Kavaler, Robert W. Brodersen, Tobias G. Noll, Menahem Lowy, Hy Murveit |
| 1984 | ICASSP | MOS-VLSI pipelined digital filters for video applications. | Walter Ulbrich, Tobias G. Noll, B. Zehner |