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Tuan D. A. Nguyen

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

6

Active years

2014–2020

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2020FPGAMaximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment.Tuan D. A. Nguyen, Akash Kumar
2019DSDOnline Peak Power and Maximum Temperature Management in Multi-core Mixed-Criticality Embedded Systems.Behnaz Ranjbar, Tuan D. A. Nguyen, Alireza Ejlali, Akash Kumar
2018ASPDACLifetime-aware design methodology for dynamic partially reconfigurable systems.Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
2018DATAColumn Scan Optimization by Increasing Intra-Instruction Parallelism.Nusrat Jahan Lisa, Annett Ungethm, Dirk Habich, Tuan D. A. Nguyen, Akash Kumar, Wolfgang Lehner
2018VLDBColumn Scan Acceleration in Hybrid CPU-FPGA Systems.Nusrat Jahan Lisa, Annett Ungethm, Dirk Habich, Wolfgang Lehner, Tuan D. A. Nguyen, Akash Kumar
2016FPGAPRFloor: An Automatic Floorplanner for Partially Reconfigurable FPGA Systems.Tuan D. A. Nguyen, Akash Kumar
2016FPLXNoC: A non-intrusive TDM circuit-switched Network-on-Chip.Tuan D. A. Nguyen, Akash Kumar
2015FPLAn automated technique to generate relocatable partial bitstreams for Xilinx FPGAs.Roel Oomen, Tuan D. A. Nguyen, Akash Kumar, Henk Corporaal
2014FPLPR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems.Tuan D. A. Nguyen, Akash Kumar