| 2026 | ISCAS | Live Demonstration: Hardware-Bound IP Protection for OWL-ViT on Edge Devices. | Peichun Hua, Hanxiu Zhang, Tuo Li, Yue Zheng, Wenye Liu |
| 2025 | ACSAC | Securing On-device Transformer with Hardware Binding and Reversible Obfuscation. | Peichun Hua, Hanxiu Zhang, Tuo Li, Yue Zheng |
| 2025 | ICCAD | RSizing: Robust Bayesian Optimization for Analog Circuit Sizing Under Process Variations. | Jindong Tu, Yapeng Li, Peng Xu, Tuo Li, Guoqing Li, Zushuai Xie, Bei Yu, Tinghuan Chen |
| 2025 | ISCAS | A Compact Full Pipeline Architecture of SM3 Algorithm with High throughput and High Efficiency. | Tuo Li, Chao Cheng, Changhong Wang, Ruiting Wang, Xiaofeng Zou, Dunshan Yu |
| 2024 | DATE | Accelerating Chaining in Genomic Analysis Using RISC- V Custom Instructions. | Kisaru Liyanage, Hasindu Gamaarachchi, Hassaan Saadat, Tuo Li, Hiruna Samarakoon, Sri Parameswaran |
| 2022 | ASPLOS | Path-sensitive and alias-aware typestate analysis for detecting OS bugs. | Tuo Li, Jia-Ju Bai, Yulei Sui, Shi-Min Hu |
| 2022 | DAC | FaSe: fast selective flushing to mitigate contention-based cache timing attacks. | Tuo Li, Sri Parameswaran |
| 2022 | DAC | HWST128: complete memory safety accelerator on RISC-V with metadata compression. | Hsu-Kang Dow, Tuo Li, Sri Parameswaran |
| 2022 | ISCC | Online Decentralized Task Allocation Optimization for Edge Collaborative Networks. | Yaqiang Zhang, Ruyang Li, Yaqian Zhao, Rengang Li, Xuelei Li, Tuo Li |
| 2022 | USENIX | DLOS: Effective Static Detection of Deadlocks in OS Kernels. | Jia-Ju Bai, Tuo Li, Shi-Min Hu |
| 2021 | DAC | SHORE: Hardware/Software Method for Memory Safety Acceleration on RISC-V. | Hsu-Kang Dow, Tuo Li, William Miles, Sri Parameswaran |
| 2020 | VLSID | A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units. | Hassaan Saadat, Tuo Li, Haris Javaid, Sri Parameswaran |
| 2017 | ICNC | Pressure casting control for thin-walled parts based on dynamic matrix control. | Xiaojun Xing, Zhen Ma, Haibo Yu, Tuo Li, Zhuoya Wang, Yaohong Qu |
| 2016 | DATE | RECORD: Reducing register traffic for checkpointing in embedded processors. | Tuo Li, Jude Angelo Ambrose, Sri Parameswaran |
| 2015 | FIE | Evaluating metrics for automatic mind map assessment in various classes. | Amber Franklin, Tuo Li, Peter Jamieson, Julie Semlak, Walter Vanderbush |
| 2015 | ISCAS | ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip. | Jude Angelo Ambrose, Nick Higgins, Mrinal Chakravarthy, Shivam Gargg, Tuo Li, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran |
| 2015 | VLSID | ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA. | Jude Angelo Ambrose, Tuo Li, Daniel Murphy, Shivam Gargg, Nick Higgins, Sri Parameswaran |
| 2015 | UIC | Key Technology of Online Auditing Data Stream Processing. | Tuo Li, Lei Wang |
| 2013 | DAC | RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors. | Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jrg Henkel, Sri Parameswaran |
| 2013 | DATE | CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors. | Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan G. Ragel, Jude Angelo Ambrose, Jrg Henkel, Sri Parameswaran |
| 2013 | ICCAD | DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems. | Tuo Li, Muhammad Shafique, Semeen Rehman, Jude Angelo Ambrose, Jrg Henkel, Sri Parameswaran |
| 2012 | DATE | Reli: Hardware/software Checkpoint and Recovery scheme for embedded processors. | Tuo Li, Roshan G. Ragel, Sri Parameswaran |
| 2012 | ICCAD | Fine-grained hardware/software methodology for process migration in MPSoCs. | Tuo Li, Jude Angelo Ambrose, Sri Parameswaran |