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Valentin Muresan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

6

Active years

2000–2016

Best venue rank

C

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2016SACISuperior vision: Always on human-like vision for intelligent devices.Valentin Muresan
2011SACIRequirements of a real-time multiprocessor operating system for multimedia applications.Valentin Stangaciu, Georgiana Macariu, Mihai V. Micea, Valentin Muresan, Brendan Barry
2006ISCASTowards an optimised VLSI design algorithm for the constant matrix multiplication problem.Andrew Kinane, Valentin Muresan, Noel E. O'Connor
2006ISCASA low complexity hardware architecture for motion estimation.Daniel Larkin, Valentin Muresan, Noel E. O'Connor
2006ISNNAn Efficient Hardware Architecture for a Neural Network Activation Function Generator.Daniel Larkin, Andrew Kinane, Valentin Muresan, Noel E. O'Connor
2001RSPMixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints.Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000ISCASThe left edge algorithm in block test scheduling under power constraints.Valentin Muresan, Xiaojun Wang, Mircea Vladutiu
2000ITCA comparison of classical scheduling approaches in power-constrained block-test scheduling.Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000VTSThe Left Edge Algorithm and the Tree Growing Technique in Block-Test Scheduling under Power Constraints.Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu
2000RSPPower-Constrained Block-Test List Scheduling.Valentin Muresan, Xiaojun Wang, Valentina Muresan, Mircea Vladutiu