| 2010 | DAC | Who solves the variability problem? | Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Ltkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger |
| 2006 | DAC | Variation-aware analysis: savior of the nanometer era? | Sani R. Nassif, Vijay Pitchumani, Norma Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic |
| 2005 | ASPDAC | Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies? | Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen |
| 2005 | ASPDAC | Embedded tutorial I: design for manufacturability. | Vijay Pitchumani |
| 2005 | ISCAS | A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimation. | Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannal Yang, Prashant Saxena, Vijay Pitchumani |
| 1995 | ISCAS | ANSA: A New Neural Net Based Scheduling Algorithm for High Level Synthesis. | M. Kemal Unaltuna, Vijay Pitchumani |
| 1994 | ICCD | A Multi-Schedule Approach to High-Level Synthesis. | Mehmet Emin Dalkili, Vijay Pitchumani |
| 1994 | ISCAS | A Stochastic Reward & Punishment Neural Network Algorithm for Circuit Bipartitioning. | M. Kemal Unaltuna, Vijay Pitchumani |
| 1994 | VLSID | HSIM1 and HSIM2: Object Oriented Algorithms for VHDL Simulation. | Neeta Ganguly, Vijay Pitchumani |
| 1993 | ISCAS | Quadrisectioning Based Placement with a Normalized Mean Field Neural Network. | M. Kemal Unaltuna, Vijay Pitchumani |
| 1991 | DAC | A System for Fault Diagnosis and Simulation of VHDL Descriptions. | Vijay Pitchumani, Pankaj Mayor, Nimish Radia |
| 1991 | ITC | Fault Diagnosis using Functional Fault Models for VHDL descriptions. | Vijay Pitchumani, Pankaj Mayor, Nimish Radia |
| 1989 | DAC | Compaction of a Routed Channel on the Connection Machine. | Shantanu Ganguly, Vijay Pitchumani |
| 1989 | DAC | A Massively Parallel Algorithm for Fault Simulation on the Connection Machine. | Vinod Narayanan, Vijay Pitchumani |
| 1989 | ICCAD | Restricted symbolic evaluation is fast and useful. | J. Lawrence Carter, Barry K. Rosen, Gordon L. Smith, Vijay Pitchumani |
| 1988 | ITC | : A Parallel Algorithm for Fault Simulation on the Connection Machine. | Vinod Narayanan, Vijay Pitchumani |
| 1983 | DAC | Formal verification of a real-time hardware design. | Zerksis D. Umrigar, Vijay Pitchumani |
| 1982 | DAC | A formal method for computer design verification. | Vijay Pitchumani, Edward P. Stabler |