Vikram Saxena
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1996–2003
Best venue rank
National
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | FPGA | Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. | Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson |
| 1997 | DATE | Monte-Carlo approach for power estimation in sequential circuits. | Vikram Saxena, Farid N. Najm, Ibrahim N. Hajj |
| 1997 | VLSID | Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. | Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee |
| 1996 | VLSID | Synthesis of Testable Pipelined Datapaths Using Genetic Search. | C. P. Ravikumar, Vikram Saxena |