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Vivek Garg

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

5

Active years

1995–2024

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASImpact of S/D Extension Length and Sheet Stacking on Transient Behavior of Nanosheet FETs.Shobhit Srivastava, Sachin Doge, Sourabh Panwar, Shashidhara M, Vivek Garg, Shivendra Yadav, Lomash Chandra, Abhishek Acharya
2006VLSIDAn Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs.Vivek Garg, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti
2005ASPDACA novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAs.Vivek Garg, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti
2005ASPDACA function generator-based reconfigurable system.Vivek Garg, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti
1996DATEIncorporating Multi-Chip Module Packaging Constraints into System Design.Vivek Garg, Steve Lacy, David E. Schimmel, Darrell Stogner, Craig D. Ulmer, D. Scott Wills, Sudhakar Yalamanchili
1995HPCAArchitectural Support for Inter-Stream Communication in a MSIMD System.Vivek Garg, David E. Schimmel