Vyacheslav N. Yarmolik
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
6
Active years
1994–2008
Best venue rank
A
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DDECS | Optimal Backgrounds Selection for Multi Run Memory Testing. | Ireneusz Mrozek, Vyacheslav N. Yarmolik |
| 2007 | DDECS | Multiple Errors Detection Technique for RAM. | Sergei B. Musin, Alexander A. Ivaniuk, Vyacheslav N. Yarmolik |
| 1999 | DATE | Symmetric Transparent BIST for RAMs. | Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik |
| 1999 | EDCC | Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. | Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich |
| 1999 | VTS | Error Detecting Refreshment for Embedded DRAMs. | Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik |
| 1998 | DATE | Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. | Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich |
| 1997 | DATE | March LA: a test for linked memory faults. | Ad J. van de Goor, Georgi Gaydadjiev, Vyacheslav N. Yarmolik, V. G. Mikitjuk |
| 1996 | VTS | March LR: a test for realistic linked faults. | Ad J. van de Goor, Georgi Gaydadjiev, V. G. Mikitjuk, Vyacheslav N. Yarmolik |
| 1995 | ITC | Exact Aliasing Computation for RAM BIST. | O. Kebichi, Michael Nicolaidis, Vyacheslav N. Yarmolik |
| 1994 | FPL | Signature Testability of PLA. | E. P. Kalosha, Vyacheslav N. Yarmolik, Mark G. Karpovsky |
| 1994 | ITC | Transparent Memory Testing for Pattern-Sensitive Faults. | Mark G. Karpovsky, Vyacheslav N. Yarmolik |
| 1994 | ITC | Aliasing-free Signature Analysis for RAM BIST. | Vyacheslav N. Yarmolik, Michael Nicolaidis, O. Kebichi |