Wei Ting Loke
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2007–2017
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | FPGA | An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic Frequency Scaling Emulation (Abstract Only). | Wei Ting Loke, Chin Yang Koay |
| 2013 | FPL | Criticality-based routing for FPGAS with reverse body bias switch box architectures. | Wei Ting Loke, Wenfeng Zhao, Yajun Ha |
| 2012 | FPGA | Power-aware FPGA technology mapping for programmable-VT architectures (abstract only). | Wei Ting Loke, Yajun Ha |
| 2007 | FPL | Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools. | Chee Sing Lee, Wei Ting Loke, Wenjuan Zhang, Yajun Ha |