| 2025 | DAC | EPIC: Error PredIction and Correction for Power-Efficient Voltage Underscaling Multiply-Accumulate Unit. | Tongjing Wu, Xiaolu Hu, Tong Li, Siting Liu, Hui Wang, Weifeng He, Zhigang Mao, Honglan Jiang |
| 2024 | DAC | Reducing DRAM Latency via In-situ Temperature- and Process-Variation-Aware Timing Detection and Adaption. | Yuxuan Qin, Chuxiong Lin, Mingche Lai, Zhang Luo, Shi Xu, Weifeng He |
| 2023 | ICCAD | TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations. | Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li, Yiming Chen, Weifeng He, Xueqing Li, Yanan Sun |
| 2023 | ISCAS | A Metastability Inference and Avoidance Technique for Near-Threshold-Voltage Network-on-Chip. | Lin Shao, Mingche Lai, Shi Xu, Chuxiong Lin, Weifeng He |
| 2023 | ISCAS | An Area-Efficient Single-Phase-Clocked and Contention-Free Flip-Flop for Ultra-Low-Voltage Operations. | Xue Yuan, Kun Su, Jingyi He, Shi Xu, Jieyu Li, Weifeng He |
| 2022 | DAC | CREAM: computing in ReRAM-assisted energy and area-efficient SRAM for neural network acceleration. | Liukai Xu, Songyuan Liu, Zhi Li, Dengfeng Wang, Yiming Chen, Yanan Sun, Xueqing Li, Weifeng He, Shi Xu |
| 2021 | DAC | CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement. | Chuxiong Lin, Weifeng He, Yanan Sun, Zhigang Mao, Mingoo Seok |
| 2021 | ICCAD | An Area-Efficient Scannable In Situ Timing Error Detection Technique Featuring Low Test Overhead for Resilient Circuits. | Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok |
| 2021 | ISCAS | Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process. | Jieyu Li, Zihan Lian, Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok |
| 2021 | ISCAS | Design of Ternary Logic-in-Memory Based on Memristive Dual-Crossbars. | Weiyi Liu, Yanan Sun, Weifeng He, Qin Wang |
| 2021 | ISCAS | An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits. | Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok |
| 2021 | ISCAS | An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM. | Hao Zhang, Jieyu Li, Weifeng He, Yanan Sun, Mingoo Seok |
| 2021 | ISCAS | High Energy-Efficient LDPC Decoder with AVFS System for NAND Flash Memory. | Chao Zhang, Jingtong Mo, Zihan Lian, Weifeng He |
| 2018 | ISCAS | Electronic-Photonic Integrated Circuit Design and Crosstalk Modeling for a High Density Multi-Lane MZM Array. | Pengfei Ji, Jing Gao, Wenyi Xu, Yanan Sun, Weifeng He, Hui Wu |
| 2017 | DATE | A static-placement, dynamic-issue framework for CGRA loop accelerator. | Zhongyuan Zhao, Weiguang Sheng, Weifeng He, Zhigang Mao, Zhaoshi Li |
| 2017 | ISCAS | A hardware-friendly hierarchical HEVC motion estimation algorithm for UHD applications. | Li Hu, Jiawei Gu, Guanghui He, Weifeng He |
| 2017 | ISCAS | A 0.2V 2.3pJ/Cycle 28dB output SNR hybrid Markov random field probabilistic-based circuit for noise immunity and energy efficiency. | Xuwei Jin, Wei Jin, Hao Zhang, Jianfei Jiang, Weifeng He |
| 2015 | ICCAD | Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs. | Naifeng Jing, Jiacheng Zhou, Jianfei Jiang, Xin Chen, Weifeng He, Zhigang Mao |
| 2014 | ISCAS | Area and throughput efficient IDCT/IDST architecture for HEVC standard. | Ziyou Yao, Weifeng He, Liang Hong, Guanghui He, Zhigang Mao |
| 2011 | FPL | Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. | Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He |
| 2011 | ICCAD | Mitigating FPGA interconnect soft errors by in-place LUT inversion. | Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He |
| 2011 | ISCAS | Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems. | Yuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao |
| 2011 | ISCAS | A thermal-aware task mapping flow for coarse-grain dynamic reconfigurable processor. | Li Xie, Weifeng He, Naifeng Jing, Zhigang Mao |
| 2005 | ISCAS | Efficient frame-level pipelined array architecture for full-search block-matching motion estimation. | Weifeng He, Yunlong Bi, Zhigang Mao |