Yiqun Zhu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2003–2013
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | FPGA | A memory-efficient hardware architecture for real-time feature detection of the SIFT algorithm (abstract only). | Wenjuan Deng, Yiqun Zhu |
| 2012 | FPL | An efficient hardware architecture of the optimised SIFT descriptor generation. | Wenjuan Deng, Yiqun Zhu, Hao Feng, Zhiguo Jiang |
| 2003 | ISCAS | A novel ACS scheme for area-efficient Viterbi decoders. | Yiqun Zhu, Mohammed Benaissa |