Yoav Etsion
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
33
Venues
20
Active years
2003–2025
Best venue rank
A*
Where they publish
Papers
33 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCA | Single-Address-Space FaaS with Jord. | Yuanlong Li, Atri Bhattacharyya, Madhur Kumar, Abhishek Bhattacharjee, Yoav Etsion, Babak Falsafi, Sanidhya Kashyap, Mathias Payer |
| 2022 | ICDE | Exploration of Knowledge Graphs via Online Aggregation. | Oren Kalinsky, Aidan Hogan, Oren Mishali, Yoav Etsion, Benny Kimelfeld |
| 2020 | ASPLOS | The TrieJax Architecture: Accelerating Graph Operations Through Relational Joins. | Oren Kalinsky, Benny Kimelfeld, Yoav Etsion |
| 2020 | DATE | LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing. | Behzad Salami, Konstantinos Parasyris, Adrin Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Ral de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jimnez, Carlos lvarez, Seyed Saber Nabavi Larimi, Sergi Madonar, Miquel Perics, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, Ren Griessl, Lennart Tigges, Kevin Mika, A. Hffmeier, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Gttel, Pascal Felber |
| 2020 | FPGA | Hardware Description Beyond Register-Transfer Level Languages. | Oron Port, Yoav Etsion |
| 2019 | ISCA | Using SMT to accelerate nested virtualization. | Llus Vilanova, Nadav Amit, Yoav Etsion |
| 2018 | ASPLOS | DATS - Data Containers for Web Applications. | Casen Hunger, Llus Vilanova, Charalampos Papamanthou, Yoav Etsion, Mohit Tiwari |
| 2018 | EuroPar | Snapshot-Based Synchronization: A Fast Replacement for Hand-over-Hand Locking. | Eran Gilad, Trevor Brown, Mark Oskin, Yoav Etsion |
| 2018 | MICRO | Inter-Thread Communication in Multithreaded, Reconfigurable Coarse-Grain Arrays. | Dani Voitsechov, Oron Port, Yoav Etsion |
| 2017 | EDBT | Flexible Caching in Trie Joins. | Oren Kalinsky, Yoav Etsion, Benny Kimelfeld |
| 2017 | EuroSys | Direct Inter-Process Communication (dIPC): Repurposing the CODOMs Architecture to Accelerate IPC. | Llus Vilanova, Marc Jord, Nacho Navarro, Yoav Etsion, Mateo Valero |
| 2017 | FPL | DFiant: A dataflow hardware description language. | Oron Port, Yoav Etsion |
| 2017 | ISCA | Do-It-Yourself Virtual Memory Translation. | Hanna Alam, Tianhao Zhang, Mattan Erez, Yoav Etsion |
| 2017 | SBAC-PAD | Towards a Deterministic Fine-Grained Task Ordering Using Multi-Versioned Memory. | Eran Gilad, Tehila Mayzels, Elazar Raab, Mark Oskin, Yoav Etsion |
| 2016 | MICRO | NeSC: Self-virtualizing nested storage controller. | Yonatan Gottesman, Yoav Etsion |
| 2015 | ISCA | Semantic locality and context-based prefetching using reinforcement learning. | Leeor Peled, Shie Mannor, Uri C. Weiser, Yoav Etsion |
| 2015 | MICRO | Control flow coalescing on a hybrid dataflow/von Neumann GPGPU. | Dani Voitsechov, Yoav Etsion |
| 2014 | ISCA | CODOMs: Protecting software with Code-centric memory Domains. | Llus Vilanova, Muli Ben-Yehuda, Nacho Navarro, Yoav Etsion, Mateo Valero |
| 2014 | ISCA | Single-graph multiple flows: Energy efficient design alternative for GPGPUs. | Dani Voitsechov, Yoav Etsion |
| 2014 | MICRO | Loop-Aware Memory Prefetching Using Code Block Working Sets. | Adi Fuchs, Shie Mannor, Uri C. Weiser, Yoav Etsion |
| 2014 | PLDI | O-structures: semantics for versioned memory. | Eran Gilad, Eric W. Mackay, Mark Oskin, Yoav Etsion |
| 2013 | ICCS | Analysis of the Task Superscalar Architecture Hardware Design. | Fahimeh Yazdanpanah, Daniel Jimnez-Gonzlez, Carlos lvarez-Martnez, Yoav Etsion, Rosa M. Badia |
| 2011 | EuroPar | FELI: HW/SW Support for On-Chip Distributed Shared Memory in Multicores. | Carlos Villavieja, Yoav Etsion, Alex Ramrez, Nacho Navarro |
| 2011 | ISPASS | Trace-driven simulation of multithreaded applications. | Alejandro Rico, Alejandro Duran, Felipe Cabarcas, Yoav Etsion, Alex Ramrez, Mateo Valero |
| 2011 | SC | Implementation of a hierarchical N-body simulator using the Ompss programming model. | Miquel Perics, Xavier Martorell, Yoav Etsion |
| 2010 | ISCA | Can Manycores Support the Memory Requirements of Scientific Applications? | Milan Pavlovic, Yoav Etsion, Alex Ramrez |
| 2010 | MICRO | Task Superscalar: An Out-of-Order Task Pipeline. | Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramrez, Rosa M. Badia, Eduard Ayguad, Jess Labarta, Mateo Valero |
| 2010 | SYSTOR | Design and implementation of a generic resource sharing virtual time dispatcher. | Tal Ben-Nun, Yoav Etsion, Dror G. Feitelson |
| 2007 | EuroSys | Fine grained kernel logging with KLogger: experience and insights. | Yoav Etsion, Dan Tsafrir, Scott Kirkpatrick, Dror G. Feitelson |
| 2005 | ICS | System noise, OS clock ticks, and fine-grained parallel applications. | Dan Tsafrir, Yoav Etsion, Dror G. Feitelson, Scott Kirkpatrick |
| 2005 | JSSPP | Modeling User Runtime Estimates. | Dan Tsafrir, Yoav Etsion, Dror G. Feitelson |
| 2004 | NOSSDAV | Desktop scheduling: how can we know what the user wants? | Yoav Etsion, Dan Tsafrir, Dror G. Feitelson |
| 2003 | SIGMETRICS | Effects of clock resolution on the scheduling of interactive and soft real-time processes. | Yoav Etsion, Dan Tsafrir, Dror G. Feitelson |