| 2025 | SIGCSE | Iterative Design of a Teaching Assistant Training Program in Computer Science Using the Agile Method. | Runda Liu, Shengqi Chen, Jiajie Chen, Songjie Niu, Yuchun Ma, Xiaofeng Tang |
| 2019 | WACV | AddressNet: Shift-Based Primitives for Efficient Convolutional Neural Networks. | Yihui He, Xianggen Liu, Huasong Zhong, Yuchun Ma |
| 2017 | EDM | Intelligent Composition of Test Papers based on MOOC Learning Data. | Lin Ma, Yuchun Ma |
| 2014 | ICCD | HW/SW partitioning for region-based dynamic partial reconfigurable FPGAs. | Yuchun Ma, Jinglan Liu, Chao Zhang, Wayne Luk |
| 2013 | ASPDAC | HS3DPG: Hierarchical simulation for 3D P/G network. | Shuai Tao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yiyu Shi, Hui Wang, Huazhong Yang |
| 2013 | CSCWD | Efficient custom instruction generation based on characterizing of basic blocks. | Guoqiang Liang, Yuchun Ma, Kang Zhao, Jinian Bian |
| 2013 | CSCWD | Automatic enhanced CDFG generation based on runtime instrumentation. | Zhongda Yuan, Yuchun Ma, Jinian Bian, Kang Zhao |
| 2012 | ASPDAC | Thermal-aware power network design for IR drop reduction in 3D ICs. | Zuowei Li, Yuchun Ma, Qiang Zhou, Yici Cai, Yu Wang, Tingting Huang, Yuan Xie |
| 2012 | ICCAD | ISBA: An independent set-based algorithm for automated partial reconfiguration module generation. | Ruining He, Yuchun Ma, Kang Zhao, Jinian Bian |
| 2011 | ASPDAC | On-chip hybrid power supply system for wireless sensor nodes. | Wulong Liu, Yu Wang, Wei Liu, Yuchun Ma, Yuan Xie, Huazhong Yang |
| 2011 | ASPDAC | Rethinking thermal via planning with timing-power-temperature dependence for 3D ICs. | Kan Wang, Yuchun Ma, Sheqin Dong, Yu Wang, Xianlong Hong, Jason Cong |
| 2011 | ASPDAC | Network flow-based simultaneous retiming and slack budgeting for low power design. | Bei Yu, Sheqin Dong, Yuchun Ma, Tao Lin, Yu Wang, Song Chen, Satoshi Goto |
| 2010 | ASPDAC | PS-FPG: pattern selection based co-design of floorplan and power/ground network with wiring resource optimization. | Li Li, Yuchun Ma, Ning Xu, Yu Wang, Xianlong Hong |
| 2010 | ASPDAC | Simultaneous slack budgeting and retiming for synchronous circuits optimization. | Shenghua Liu, Yuchun Ma, Xianlong Hong, Yu Wang |
| 2009 | ASPDAC | A novel thermal optimization flow using incremental floorplanning for 3D ICs. | Xin Li, Yuchun Ma, Xianlong Hong |
| 2009 | ISLPED | Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. | Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang |
| 2008 | ASPDAC | LP based white space redistribution for thermal via planning and performance optimization in 3D ICs. | Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong, Jason Cong |
| 2007 | ASPDAC | Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation. | Jiayi Liu, Sheqin Dong, Yuchun Ma, Di Long, Xianlong Hong |
| 2007 | ASPDAC | Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. | Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou |
| 2007 | ICCAD | 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. | Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong, Qiang Zhou |
| 2007 | ICCD | Fine grain 3D integration for microarchitecture design through cube packing exploration. | Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinman, Jason Cong |
| 2007 | ISCAS | A Fast 3D-BSG Algorithm for 3D Packing Problem. | Lingyi Zhang, Sheqin Dong, Xianlong Hong, Yuchun Ma |
| 2006 | ASPDAC | An automated design flow for 3D microarchitecture evaluation. | Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Reinman, Jie Wei, Yan Zhang |
| 2005 | ISCAS | VLSI block placement with alignment constraints based on corner block list. | Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng |
| 2005 | ISCAS | Performance constrained floorplanning based on partial clustering [IC layout]. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng |
| 2004 | ASPDAC | A buffer planning algorithm with congestion optimization. | Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2004 | ASPDAC | Buffer allocation algorithm with consideration of routing congestion. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2003 | ASPDAC | A buffer planning algorithm based on dead space redistribution. | Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2003 | DAC | Dynamic global buffer planning optimization based on detail block locating and congestion analysis. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2003 | ISCAS | Evaluating a bounded slice-line grid assignment in O(nlogn) time. | Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2003 | ISCAS | Arbitrary convex and concave rectilinear block packing based on corner block list. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Song Chen, Chung-Kuan Cheng, Jun Gu |
| 2002 | VLSID | Stairway Compaction using Corner Block List and Its Applications with Rectilinear Blocks. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2001 | ASPDAC | VLSI floorplanning with boundary constraints based on corner block list. | Yuchun Ma, Sheqin Dong, Xianlong Hong, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2001 | DAC | Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List. | Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu |