Yuh-Fang Tsai
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
6
Active years
2001–2005
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | DATE | Leakage-Aware Interconnect for On-Chip Network. | Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin |
| 2005 | ICCD | Three-Dimensional Cache Design Exploration Using 3DCacti. | Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2005 | VLSID | Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. | Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin |
| 2004 | FPGA | Reducing leakage energy in FPGAs using region-constrained placement. | Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan |
| 2003 | DAC | Implications of technology scaling on leakage reduction techniques. | Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2002 | VLSID | Evaluating Run-Time Techniques for Leakage Power Reduction. | David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2001 | MICRO | Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. | Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai |