| 2025 | Tencon | Machine Learning-Based Analysis Method for Brain Activity Measurement Data Under Pleasant and Unpleasant Stimuli. | Takumi Ishimoto, Rui Takahashi, Shuya Shida, Yutaka Suzuki |
| 2025 | Tencon | Electroencephalogram-Based Feature Classification During Swallowing Using Deep Learning. | Rui Takahashi, Shuya Shida, Kyoko Yamazaki, Motoki Arakawa, Kaoru Miyano, Yutaka Suzuki |
| 2024 | Tencon | Detection of Esophageal Wall via Deep Learning-Based Object Detection with Ultrasound System. | Rikuto Matsuyama, Yutaka Suzuki, Shuya Shida, Motoki Arakawa |
| 2024 | Tencon | EEG Changes During Carbonated-Beverage Swallowing. | Rui Takahashi, Yutaka Suzuki, Shuya Shida, Kyoko Yamazaki |
| 2021 | IGARSS | The Latest Status of Our First Demonstration Satellite of the Commercial Small Synthetic Aperture Radar After the Launch. | Toshihiro Obata, Motoyuki Arai, Shoichiro Asada, Tomoyuki Imaizumi, Yutaka Suzuki |
| 2018 | IECON | Development of Manufacturing Equipment for a Concavo-Convex Patterned Sheet to Protect Fruits. | Koji Makino, Kazuyoshi Ishida, Kazuya Mori, Hiromi Watanabe, Yutaka Suzuki, Shinji Kotani, Hidetsugu Terada |
| 2017 | IECON | Study of the adaptation of a concavo-convex sheet for a peach fruit inspection system. | Koji Makino, Kazuyoshi Ishida, Hiromi Watanabe, Yutaka Suzuki, Shinji Kotani, Hidetsugu Terada |
| 2017 | RO-MAN | Development of a concavo-convex non-woven cloth to reduce shock to fruit. | Koji Makino, Kazuyoshi Ishida, Hiromi Watanabe, Yutaka Suzuki, Shinji Kotani, Hidetsugu Terada |
| 1991 | ICASSP | Single board video codec for ISDN visual telephone. | Tetsuo Tajiri, Yutaka Suzuki, Shinji Nishimura, Hiroshi Yoshimura |
| 1991 | ICASSP | A highly-parallel single-chip DSP architecture for video signal processing. | Hironori Yamauchi, Yutaka Tashiro, Toshihiro Minami, Yutaka Suzuki |
| 1991 | ITC | An Organized Firmware Verification Environment for the Programmable Image DSP. | Yutaka Tashiro, Hironori Yamauchi, Toshihiro Minami, Tetsuo Tajiri, Yutaka Suzuki |
| 1986 | ICASSP | A study of VLSI logic design for DPCM coding. | Naoki Mukawa, Yutaka Suzuki, Hideo Kuroda, Hiroshi Yoshimura |