| 2017 | SAFECOMP | A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2. | Haris Isakovic, Radu Grosu, Denise Ratasich, Jiri Kadlec, Zdenek Pohl, Steve Kerrison, Kyriakos Georgiou, Kerstin Eder, Norbert Druml, Lillian Tadros, Flemming Christensen, Emilie Wheatley, Bastian Farkas, Rolf Meyer, Mladen Berekovic |
| 2011 | FPL | Resource Management for the Heterogeneous Arrays of Hardware Accelerators. | Zdenek Pohl, Milan Tich |
| 2007 | FPL | RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator for the Microblaze Processor. | Zdenek Pohl, Milan Tich |
| 2005 | FPGA | Figaro: an automatic tool flow for designs with dynamic reconfiguration (abstract only). | Kelly Nasi, Martin Danek, Theodoros Karoubalis, Zdenek Pohl |
| 2005 | FPL | Figaro - An Automatic Tool Flow for Designs with Dynamic Reconfiguration. | Kelly Nasi, Martin Danek, Theodoros Karoubalis, Zdenek Pohl |
| 2005 | FPL | Performance Tuning of Iterative Algorithms in Signal Processing. | Zdenek Pohl, Premysl Sucha, Jiri Kadlec, Zdenek Hanzlek |
| 2004 | RTAS | Scheduling of Iterative Algorithms on FPGA with Pipelined Arithmetic Unit. | Premysl Sucha, Zdenek Pohl, Zdenek Hanzlek |
| 2003 | FPGA | Lattice adaptive filter implementation for FPGA. | Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tich, Miroslav Lcko |
| 2003 | FPL | FPGA Implementation of the Adpaptive Lattice Filter. | Antonin Hermanek, Zdenek Pohl, Jiri Kadlec |
| 2002 | FPL | Logarithmic Number System and Floating-Point Arithmetics on FPGA. | Rudolf Matousek, Milan Tich, Zdenek Pohl, Jiri Kadlec, Christopher I. Softley, Nick Coleman |