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Zvonko G. Vranesic

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

28

Venues

17

Active years

1973–2009

Best venue rank

A*

Where they publish

Papers

28 indexed papers, newest first.

YearVenueTitleAuthors
2009FPLEnhancements to FPGA design methodology using streaming.Franjo Plavec, Zvonko G. Vranesic, Stephen Brown
2008FDLTowards Compilation of Streaming Programs into FPGA Hardware.Franjo Plavec, Zvonko G. Vranesic, Stephen Brown
2008FDLStream Programming for FPGAs.Franjo Plavec, Zvonko G. Vranesic, Stephen Brown
2007ICSoftOn Digital Search Trees - A Simple Method for Constructing Balanced Binary Trees.Franjo Plavec, Zvonko G. Vranesic, Stephen Brown
2006FCCMA Multithreaded Soft Processor for SoPC Area Reduction.Blair Fort, Davor Capalija, Zvonko G. Vranesic, Stephen Dean Brown
2006FPLAdaptive FPGAs: High-Level Architecture and a Synthesis Method.Valavan Manohararajah, Stephen Dean Brown, Zvonko G. Vranesic
2003WCAEUse of HDLs in teaching of computer hardware courses.Zvonko G. Vranesic, Stephen Brown
2002FPLAutomatic Partitioning for Improved Placement and Routing in Complex Programmable Logic Devices.Valavan Manohararajah, Terry P. Borer, Stephen Dean Brown, Zvonko G. Vranesic
2000ICPPThe NUMAchine Multiprocessor.R. Grindley, Tarek S. Abdelrahman, Stephen Brown, S. Caranci, D. DeVries, Benjamin Gamsa, A. Grbic, M. Gusat, R. Ho, Orran Krieger, Guy G. Lemieux, K. Loveless, Naraig Manjikian, P. McHardy, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic
1998DACDesign and Implementation of the NUMAchine Multiprocessor.A. Grbic, Stephen Brown, S. Caranci, R. Grindley, M. Gusat, Guy G. Lemieux, K. Loveless, Naraig Manjikian, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic
1997FPGAMemory-to-Memory Connection Structures in FPGAs with Embedded Memory Arrays.Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic
1997ISCAMemory-System Design Considerations for Dynamically-Scheduled Processors.Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic
1997MICROThe Multicluster Architecture: Reducing Cycle Time Through Partitioning.Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic
1996DACExperience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools.Stephen Brown, Naraig Manjikian, Zvonko G. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Zeljko Zilic, Sinisa Srbljic
1996FPGAUsing BDDs to Design ULMs for FPGAs.Zeljko Zilic, Zvonko G. Vranesic
1995EuroParBidirectional Ring: An Alternative to the Hierarchy of Unidirectional Rings.Muhammad Jaseemuddin, Zvonko G. Vranesic
1995FPGAArchitecture of Centralized Field-Configurable Memory.Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic
1994HPDCPerformance Prediction for Different Consistency Schemes in Distributed Shared Memory Systems.Sinisa Srbljic, Zvonko G. Vranesic, Leo Budin
1992SCCache Consistency in Hierarchical-Ring-Based Multiprocessors.Keith I. Farkas, Zvonko G. Vranesic, Michael Stumm
1991DACChortle-crf: Fast Technology Mapping for Lookup Table-Based FPGAs.Robert J. Francis, Jonathan Rose, Zvonko G. Vranesic
1991ICCADTechnology Mapping on Lookup Table-Based FPGAs for Performance.Robert J. Francis, Jonathan Rose, Zvonko G. Vranesic
1991INFOCOMA Hybrid Token/Insertion Ring LAN.Zvonko G. Vranesic, V. Carl Hamacher, A. K. Sanwalka, Safwat G. Zaky
1990ICCADA Detailed Router for Field-Programmable Gate Arrays.Stephen Brown, Jonathan Rose, Zvonko G. Vranesic
1990INFOCOMTORMLAN - A Multichannel Local Area Network Protocol.Lap-kong Chan, Zvonko G. Vranesic
1990SIGGRAPHReusable motion synthesis using state-space controllers.Michiel van de Panne, Eugene Fiume, Zvonko G. Vranesic
1983DACOn fault detection in CMOS logic networks.Kuang-Wei Chiang, Zvonko G. Vranesic
1981SIGCOMMTORNET: A local area network.Zvonko G. Vranesic, V. Carl Hamacher, Wayne M. Loucks, Safwat G. Zaky
1973ISCADesign of a Fully Variable - Length Structured Minicomputer.Zvonko G. Vranesic, V. Carl Hamacher, Y. Y. Leung