| 2025 | Efficient ML-Based Transient Thermal Prediction for 3D-ICs. | Yun-Feng Yang, Wei-Shen Wang, Yung-Jen Lee, James Chien-Mo Li, Norman Chang, Akhilesh Kumar, Ying-Shiun Li, Jessica Yen, Lang Lin |
| 2025 | A Fail-Slow Detection Framework for HBM Devices. | Zikang Xu, Yiming Zhang, Zhirong Shen |
| 2025 | A Tri-Mode Harmonic-Selection Mixer with Multiphase LO Supporting 24.25-71GHz for Multi-Band 5G NR. | Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada |
| 2025 | Efficient Hypergraph Modeling of VLSI Circuits for the MFS-Based Emulation and Simulation Acceleration. | Jiahao Xu, Chunyan Pei, Shengbo Tong, Wenjian Yu |
| 2025 | Reuse and Blend: A Weight-Sharing Energy-Efficient Optical Neural Network. | Bo Xu, Yuetong Fang, Shaoliang Yu, Renjing Xu |
| 2025 | Accelerator for LLM-Enhanced GNN with Product Quantization and Unified Indexing. | Jiaming Xu, Jinhao Li, Jun Liu, Hao Zhou, Guohao Dai |
| 2025 | LUTMUL: Exceed Conventional FPGA Roofline Limit by LUT-based Efficient Multiplication for Neural Network Inference. | Yanyue Xie, Zhengang Li, Dana Diaconu, Suranga Handagala, Miriam Leeser, Xue Lin |
| 2025 | Mpache: Interaction Aware Multi-level Cache Bypassing on GPUs. | Mengyue Xi, Tianyu Guo, Xuanteng Huang, Zejia Lin, Xianwei Zhang |
| 2025 | TL-CSE: Microarchitecture-Compiler Co-design Space Exploration via Transfer Learning. | Zheng Wu, Jinyi Shen, Xuyang Zhao, Changxu Liu, Li Shang, Fan Yang |
| 2025 | ROBIN: A Novel Framework for Accelerating Robust Multi-Variant Training. | Yan Wang, Xingbin Wang, Yulan Su, Sisi Zhang, Zechao Lin, Dan Meng, Rui Hou |
| 2025 | ETPG: Efficient Transition Fault Simulation via Dual-Strategy Pattern Parallelism and Gate Restructuring. | Mingjun Wang, Hui Wang, Zizhen Liu, Feng Gu, Jianan Mu, Jiaping Tang, Jun Gao, Huawei Li, Jing Ye, Xiaowei Li |
| 2025 | AIPlace: Analog IC Placement with Multi-Task Learning Framework. | Lijie Wang, Jing Wang, Song Chen, Qi Xu |
| 2025 | Machine Learning-Based Real-Time Detection of Power Analysis Attacks Using Supply Voltage Comparisons. | Nan Wang, Ruichao Liu, Yufeng Shan, Yu Zhu, Song Chen |
| 2025 | TRIFP-DCIM: A Toggle-Rate-Immune Floating-point Digital Compute-in-Memory Design with Adaptive-Asymmetric Compute-Tree. | Xing Wang, Tianhui Jiao, Shaochen Li, Yuchen Ma, Zhican Zhang, Zhichao Liu, Xi Chen, Xin Si |
| 2025 | SI-Aware Wire Timing Prediction at Pre-Routing Stage with Multi-Corner Consideration. | Yushan Wang, Xu He, Renjun Zhao, Yao Wang, Chang Liu, Yang Guo |
| 2025 | RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework. | Kun Wang, Kaiyan Chang, Mengdi Wang, Xingqi Zou, Haobo Xu, Yinhe Han, Ying Wang |
| 2025 | LightCL: Compact Continual Learning with Low Memory Footprint For Edge Device. | Zeqing Wang, Fei Cheng, Kangye Ji, Bohu Huang |
| 2025 | MICSim: A Modular Simulator for Mixed-signal Compute-in-Memory based AI Accelerator. | Cong Wang, Zeming Chen, Shanshi Huang |
| 2025 | HyPPO: Hybrid Piece-wise Polynomial Approximation and Optimization for Hardware Efficient Designs. | Lakshmi Sai Niharika Vulchi, Pranathi Valipireddy, Mahati Basavaraju, Madhav Rao |
| 2025 | Raads: Rapidus's AI/ML based assisted design flow to reduce design period halved. | Koki Tsurusaki |
| 2025 | ResCap: Fast-yet-Accurate Capacitance Extraction for Standard Cell Design by Physics-Guided Machine Learning. | Jiun-Cheng Tsai, Hsuan-Ming Huang, Wei-Min Hsu, Pei-Ting Lee, Jen-Hang Yang, Heng-Liang Huang, Yen-Ju Su, Charles H.-P. Wen |
| 2025 | Via Fabrication with Multi-Row Guiding Templates Using Lamellar DSA. | Yun-Na Tsai, Shao-Yun Fang |
| 2025 | Hardware Synthesizable Exceptions using Continuations. | Paul Teng, Christophe Dubach |
| 2025 | Hybrid Temporal Computing for Lower Power Hardware Accelerators. | Maliha Tasnim, Sachin Sachdeva, Yibo Liu, Sheldon X.-D. Tan |
| 2025 | OPL4GPT: An Application Space Exploration of Optimal Programming Language for Hardware Design by LLM. | Kimia Tasnia, Sazadur Rahman |