| 2026 | ASPDAC | ENLighten: Lighten the Transformer, Enable Efficient Optical Acceleration. | Hanqing Zhu, Zhican Zhou, Shupeng Ning, Xuhao Wu, Ray T. Chen, Yating Wan, David Z. Pan |
| 2026 | DATE | GRAIN: A Design-Intent-Driven Analog Layout Migration Framework. | Bingyang Liu, Haoning Jiang, Haoyi Zhang, Xiaohan Gao, Zichen Kong, Xiyuan Tang, David Z. Pan, Yibo Lin |
| 2026 | FCCM | DiffRouter: A Differentiable Routing Framework for UltraScale FPGAs. | Xiaohan Gao, Zhili Xiong, Yusu Wang, David Z. Pan |
| 2025 | AAAI | AnalogCoder: Analog Circuit Design via Training-Free Code Generation. | Yao Lai, Sungyoung Lee, Guojin Chen, Souradip Poddar, Mengkang Hu, David Z. Pan, Ping Luo |
| 2025 | ASPDAC | ML-Assisted RF IC Design Enablement: the New Frontier of AI for EDA. | Hyunsu Chae, Song Hang Chai, Taiyun Chi, Sensen Li, David Z. Pan |
| 2025 | DAC | TransRoute: A Novel Hierarchical Transistor-Level Routing Framework Beyond Standard-Cell Methodology. | Chen-Hao Hsu, David Z. Pan, Laurent Perron, Frdric Didier, Xiaoqing Xu, Hao Chen |
| 2025 | DAC | Late Breaking Results: Breaking Symmetry - Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning. | Supriyo Maji, Linran Zhao, Souradip Poddar, David Z. Pan |
| 2025 | DAC | INSIGHT: A Universal Neural Simulator Framework for Analog Circuits with Autoregressive Transformers. | Souradip Poddar, Youngmin Oh, Yao Lai, Hanqing Zhu, Bosun Hwang, David Z. Pan |
| 2025 | ICCAD | Invited Paper: Towards Generative AI for Analog and RF IC Design: From Spec to Layout. | Hyunsu Chae, Seunggeun Kim, Souradip Poddar, Xiaohan Gao, Sensen Li, David Z. Pan |
| 2025 | ICCAD | PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning. | Seunggeun Kim, Ziyi Wang, Sungyoung Lee, Youngmin Oh, Hanqing Zhu, Doyun Kim, David Z. Pan |
| 2025 | ICCAD | Differentiable Timing-Driven FPGA Placement with Smooth Optimization and ML-Based Delay Calibration. | Yu-Kang Lin, Zhili Xiong, David Z. Pan |
| 2025 | ICCAD | M3: Mamba-assisted Multi-Circuit Optimization via Model-based RL with Effective Scheduling. | Youngmin Oh, Jinje Park, Taejin Paik, Seunggeun Kim, Suwan Kim, Yoon Hyeok Lee, David Z. Pan |
| 2025 | ICCAD | MM-GRADE: A Multi-Modal EDA Tool Documentation QA Framework Leveraging Retrieval Augmented Generation. | Yuan Pu, Zhuolun He, Shutong Lin, Jiajun Qin, Xinyun Zhang, Hairuo Han, Haisheng Zheng, Yuqi Jiang, Cheng Zhuo, Qi Sun, David Z. Pan, Bei Yu |
| 2025 | ICCAD | GPU Acceleration for Versatile Buffer Insertion. | Yuan Pu, Yuhao Ji, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu |
| 2025 | ICCAD | NUA-Timer: Pre-Synthesis Timing Prediction Under Non-Uniform Input Arrival Times. | Ziyi Wang, Fangzhou Liu, Tsung-Yi Ho, David Z. Pan, Bei Yu |
| 2025 | VTS | ChipMnd: LLMs for Agile Chip Design. | Farshad Firouzi, David Z. Pan, Jiaqi Gu, Bahar J. Farahani, Jayeeta Chaudhuri, Ziang Yin, Pingchuan Ma, Peter Domanski, Krishnendu Chakrabarty |
| 2024 | ASPDAC | ISOP-Yield: Yield-Aware Stack-Up Optimization for Advanced Package using Machine Learning. | Hyunsu Chae, Keren Zhu, Bhyrav Mutnury, Zixuan Jiang, Daniel De Araujo, Douglas Wallace, Douglas Winterberg, Adam R. Klivans, David Z. Pan |
| 2024 | ASPDAC | TransPlace: A Scalable Transistor-Level Placer for VLSI Beyond Standard-Cell-Based Design. | Chen-Hao Hsu, Xiaoqing Xu, Hao Chen, Dino Ruic, David Z. Pan |
| 2024 | ASPDAC | Toward End-to-End Analog Design Automation with ML and Data-Driven Approaches (Invited Paper). | Supriyo Maji, Ahmet Faruk Budak, Souradip Poddar, David Z. Pan |
| 2024 | DATE | Analog Transistor Placement Optimization Considering Nonlinear Spatial Variations. | Supriyo Maji, Sungyoung Lee, David Z. Pan |
| 2024 | DATE | A Data-Driven Analog Circuit Synthesizer with Automatic Topology Selection and Sizing. | Souradip Poddar, Ahmet Faruk Budak, Linran Zhao, Chen-Hao Hsu, Supriyo Maji, Keren Zhu, Yaoyao Jia, David Z. Pan |
| 2024 | DATE | Subgraph Extraction-Based Feedback-Guided Iterative Scheduling for HLS. | Hanchen Ye, David Z. Pan, Chris Leary, Deming Chen, Xiaoqing Xu |
| 2024 | FCCM | A Data-Driven, Congestion-Aware and Open-Source Timing-Driven FPGA Placer Accelerated by GPUs. | Zhili Xiong, Rachel Selina Rajarathnam, David Z. Pan |
| 2024 | FPL | Better Together: Combining Analytical and Annealing Methods for FPGA Placement. | Rachel Selina Rajarathnam, Kate Thurmer, Vaughn Betz, Mahesh A. Iyer, David Z. Pan |
| 2024 | HPCA | Lightening-Transformer: A Dynamically-Operated Optically-Interconnected Photonic Transformer Accelerator. | Hanqing Zhu, Jiaqi Gu, Hanrui Wang, Zixuan Jiang, Zhekai Zhang, Rongxing Tang, Chenghao Feng, Song Han, Ray T. Chen, David Z. Pan |
| 2024 | ICCAD | PulseRF: Physics Augmented ML Modeling and Synthesis for High-Frequency RFIC Design. | Hyunsu Chae, Hao Yu, Sensen Li, David Z. Pan |
| 2024 | ICCAD | Differentiable Edge-based OPC. | Guojin Chen, Haoyu Yang, Haoxing Mark Ren, Bei Yu, David Z. Pan |
| 2024 | ISCA | Atomique: A Quantum Compiler for Reconfigurable Neutral Atom Arrays. | Hanrui Wang, Pengyu Liu, Daniel Bochen Tan, Yilian Liu, Jiaqi Gu, David Z. Pan, Jason Cong, Umut A. Acar, Song Han |
| 2023 | ASPDAC | APOSTLE: Asynchronously Parallel Optimization for Sizing Analog Transistors Using DNN Learning. | Ahmet Faruk Budak, David Smart, Brian Swahn, David Z. Pan |
| 2023 | DATE | ISOP: Machine Learning-Assisted Inverse Stack-Up Optimization for Advanced Package Design. | Hyunsu Chae, Bhyrav Mutnury, Keren Zhu, Douglas Wallace, Douglas Winterberg, Daniel De Araujo, Jay Reddy, Adam R. Klivans, David Z. Pan |
| 2023 | ICCAD | Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks. | Ahmet Faruk Budak, Keren Zhu, David Z. Pan |
| 2023 | QCE | QuantumSEA: In-Time Sparse Exploration for Noise Adaptive Quantum Circuits. | Tianlong Chen, Zhenyu Zhang, Hanrui Wang, Jiaqi Gu, Zirui Li, David Z. Pan, Frederic T. Chong, Song Han, Zhangyang Wang |
| 2022 | ASPDAC | Automating Analog Constraint Extraction: From Heuristics to Learning: (Invited Paper). | Keren Zhu, Hao Chen, Mingjie Liu, David Z. Pan |
| 2022 | ASPDAC | Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits. | Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Wei Shi, Nan Sun, David Z. Pan |
| 2022 | ASPDAC | Reinforcement Learning for Electronic Design Automation: Case Studies and Perspectives: (Invited Paper). | Ahmet Faruk Budak, Zixuan Jiang, Keren Zhu, Azalia Mirhoseini, Anna Goldie, David Z. Pan |
| 2022 | ASPDAC | DREAMPlaceFPGA: An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit. | Rachel Selina Rajarathnam, Mohamed Baker Alawieh, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan |
| 2022 | ASPDAC | ELight: Enabling Efficient Photonic In-Memory Neurocomputing with Life Enhancement. | Hanqing Zhu, Jiaqi Gu, Chenghao Feng, Mingjie Liu, Zixuan Jiang, Ray T. Chen, David Z. Pan |
| 2022 | CVPR | Multi-Scale High-Resolution Vision Transformer for Semantic Segmentation. | Jiaqi Gu, Hyoukjun Kwon, Dilin Wang, Wei Ye, Meng Li, Yu-Hsin Chen, Liangzhen Lai, Vikas Chandra, David Z. Pan |
| 2022 | DAC | QuantumNAT: quantum noise-aware training with noise injection, quantization and normalization. | Hanrui Wang, Jiaqi Gu, Yongshan Ding, Zirui Li, Frederic T. Chong, David Z. Pan, Song Han |
| 2022 | DAC | QOC: quantum on-chip training with parameter shift and gradient pruning. | Hanrui Wang, Zirui Li, Jiaqi Gu, Yongshan Ding, David Z. Pan, Song Han |
| 2022 | DAC | A timing engine inspired graph neural network model for pre-routing slack prediction. | Zizheng Guo, Mingjie Liu, Jiaqi Gu, Shuhan Zhang, David Z. Pan, Yibo Lin |
| 2022 | DAC | ADEPT: automatic differentiable DEsign of photonic tensor cores. | Jiaqi Gu, Hanqing Zhu, Chenghao Feng, Zixuan Jiang, Mingjie Liu, Shuhan Zhang, Ray T. Chen, David Z. Pan |
| 2022 | DATE | Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories. | Hao Chen, Walker J. Turner, David Z. Pan, Haoxing Ren |
| 2022 | HPCA | QuantumNAS: Noise-Adaptive Search for Robust Quantum Circuits. | Hanrui Wang, Yongshan Ding, Jiaqi Gu, Yujun Lin, David Z. Pan, Frederic T. Chong, Song Han |
| 2022 | ICCAD | TAG: Learning Circuit Spatial Embedding from Layouts. | Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren |
| 2022 | ICCAD | TorchQuantum Case Study for Robust Quantum Circuits. | Hanrui Wang, Zhiding Liang, Jiaqi Gu, Zirui Li, Yongshan Ding, Weiwen Jiang, Yiyu Shi, David Z. Pan, Frederic T. Chong, Song Han |
| 2022 | ICCAD | Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Acceleration. | Hanqing Zhu, Keren Zhu, Jiaqi Gu, Harrison Jin, Ray T. Chen, Jean Anne C. Incorvia, David Z. Pan |
| 2021 | AAAI | Efficient On-Chip Learning for Optical Neural Networks Through Power-Aware Sparse Zeroth-Order Optimization. | Jiaqi Gu, Chenghao Feng, Zheng Zhao, Zhoufeng Ying, Ray T. Chen, David Z. Pan |
| 2021 | ASPDAC | Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks. | Xiaohan Gao, Chenhui Deng, Mingjie Liu, Zhiru Zhang, David Z. Pan, Yibo Lin |
| 2021 | DAC | DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks. | Ahmet Faruk Budak, Prateek Bhansali, Bo Liu, Nan Sun, David Z. Pan, Chandramouli V. Kashyap |
| 2021 | DAC | Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks. | Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2021 | DAC | Interactive Analog Layout Editing with Instant Placement Legalization. | Xiaohan Gao, Mingjie Liu, David Z. Pan, Yibo Lin |
| 2021 | DATE | SqueezeLight: Towards Scalable Optical Neural Networks with Multi-Operand Ring Resonators. | Jiaqi Gu, Chenghao Feng, Zheng Zhao, Zhoufeng Ying, Mingjie Liu, Ray T. Chen, David Z. Pan |
| 2021 | DATE | O2NN: Optical Neural Networks with Differential Detection-Enabled Optical Operands. | Jiaqi Gu, Zheng Zhao, Chenghao Feng, Zhoufeng Ying, Ray T. Chen, David Z. Pan |
| 2021 | DATE | Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. | Mingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren |
| 2021 | DATE | Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. | Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jnata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee |
| 2021 | ICCAD | OpenSAR: An Open Source Automated End-to-end SAR ADC Compiler. | Mingjie Liu, Xiyuan Tang, Keren Zhu, Hao Chen, Nan Sun, David Z. Pan |
| 2021 | ICCV | Towards Memory-Efficient Neural Networks via Multi-Level in situ Generation. | Jiaqi Gu, Hanqing Zhu, Chenghao Feng, Mingjie Liu, Zixuan Jiang, Ray T. Chen, David Z. Pan |
| 2020 | ASPDAC | High-Definition Routing Congestion Prediction for Large-Scale FPGAs. | Mohamed Baker Alawieh, Wuxi Li, Yibo Lin, Love Singhal, Mahesh A. Iyer, David Z. Pan |
| 2020 | ASPDAC | Towards Area-Efficient Optical Neural Networks: An FFT-based Architecture. | Jiaqi Gu, Zheng Zhao, Chenghao Feng, Mingjie Liu, Ray T. Chen, David Z. Pan |
| 2020 | ASPDAC | S | Mingjie Liu, Wuxi Li, Keren Zhu, Biying Xu, Yibo Lin, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2020 | DAC | Wafer Map Defect Patterns Classification using Deep Selective Learning. | Mohamed Baker Alawieh, Duane S. Boning, David Z. Pan |
| 2020 | DAC | FLOPS: EFficient On-Chip Learning for OPtical Neural Networks Through Stochastic Zeroth-Order Optimization. | Jiaqi Gu, Zheng Zhao, Chenghao Feng, Wuxi Li, Ray T. Chen, David Z. Pan |
| 2020 | DAC | SHIELDeNN: Online Accelerated Framework for Fault-Tolerant Deep Neural Network Architectures. | Navid Khoshavi, Arman Roohi, Connor Broyles, Saman Sargolzaei, Yu Bi, David Z. Pan |
| 2020 | DAC | Closing the Design Loop: Bayesian Optimization Assisted Hierarchical Analog Layout Synthesis. | Mingjie Liu, Keren Zhu, Xiyuan Tang, Biying Xu, Wei Shi, Nan Sun, David Z. Pan |
| 2020 | DATE | ROQ: A Noise-Aware Quantization Scheme Towards Robust Optical Neural Networks with Low-bit Controls. | Jiaqi Gu, Zheng Zhao, Chenghao Feng, Hanqing Zhu, Ray T. Chen, David Z. Pan |
| 2020 | DATE | Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning. | Mingjie Liu, Keren Zhu, Jiaqi Gu, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2020 | ECCV | An Efficient Training Framework for Reversible Neural Architectures. | Zixuan Jiang, Keren Zhu, Mingjie Liu, Jiaqi Gu, David Z. Pan |
| 2020 | ICCAD | Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow. | Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2020 | ICCAD | Re-examining VLSI Manufacturing and Yield through the Lens of Deep Learning : (Invited Talk). | Mohamed Baker Alawieh, Wei Ye, David Z. Pan |
| 2020 | ICCAD | Toward Silicon-Proven Detailed Routing for Analog and Mixed-Signal Circuits. | Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2020 | ICCAD | DREAMPlace 3.0: Multi-Electrostatics Based Robust VLSI Placement with Region Constraints. | Jiaqi Gu, Zixuan Jiang, Yibo Lin, David Z. Pan |
| 2019 | ASPDAC | S | Mohamed Baker Alawieh, Xiyuan Tang, David Z. Pan |
| 2019 | ASPDAC | Semi-supervised hotspot detection with self-paced multi-task learning. | Ying Chen, Yibo Lin, Tianyang Gai, Yajuan Su, Yayi Wei, David Z. Pan |
| 2019 | ASPDAC | A shape-driven spreading algorithm using linear programming for global placement. | Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan |
| 2019 | ASPDAC | Tackling signal electromigration with learning-based detection and multistage mitigation. | Wei Ye, Mohamed Baker Alawieh, Yibo Lin, David Z. Pan |
| 2019 | ASPDAC | LithoROC: lithography hotspot detection with explicit ROC optimization. | Wei Ye, Yibo Lin, Meng Li, Qiang Liu, David Z. Pan |
| 2019 | ASPDAC | Hardware-software co-design of slimmed optical neural networks. | Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Lu Zhang, Biying Xu, Bei Yu, Ray T. Chen, David Z. Pan |
| 2019 | DAC | GAN-SRAF: Sub-Resolution Assist Feature Generation Using Conditional Generative Adversarial Networks. | Mohamed Baker Alawieh, Yibo Lin, Zaiwei Zhang, Meng Li, Qixing Huang, David Z. Pan |
| 2019 | DAC | Rethinking Sparsity in Performance Modeling for Analog and Mixed Circuits using Spike and Slab Models. | Mohamed Baker Alawieh, Sinead A. Williamson, David Z. Pan |
| 2019 | DAC | DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. | Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan |
| 2019 | DAC | WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout. | Biying Xu, Yibo Lin, Xiyuan Tang, Shaolan Li, Linxiao Shen, Nan Sun, David Z. Pan |
| 2019 | DAC | LithoGAN: End-to-End Lithography Modeling with Generative Adversarial Networks. | Wei Ye, Mohamed Baker Alawieh, Yibo Lin, David Z. Pan |
| 2019 | DATE | KC2: Key-Condition Crunching for Fast Sequential Circuit Deobfuscation. | Kaveh Shamsi, Meng Li, David Z. Pan, Yier Jin |
| 2019 | DATE | Litho-GPA: Gaussian Process Assurance for Lithography Hotspot Detection. | Wei Ye, Mohamed Baker Alawieh, Meng Li, Yibo Lin, David Z. Pan |
| 2019 | DATE | Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis. | Zheng Zhao, Derong Liu, Zhoufeng Ying, Biying Xu, Chenghao Feng, Ray T. Chen, David Z. Pan |
| 2019 | FPGA | Simultaneous Placement and Clock Tree Construction for Modern FPGAs. | Wuxi Li, Mehrdad E. Dehkordi, Stephen Yang, David Z. Pan |
| 2019 | FPL | FPGA Accelerated FPGA Placement. | Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan |
| 2019 | ICCAD | Mixed Precision Neural Architecture Search for Energy Efficient Deep Learning. | ChengYue Gong, Zixuan Jiang, Dilin Wang, Yibo Lin, Qiang Liu, David Z. Pan |
| 2019 | ICCAD | elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs. | Wuxi Li, Yibo Lin, David Z. Pan |
| 2019 | ICCAD | IcySAT: Improved SAT-based Attacks on Cyclic Locked Circuits. | Kaveh Shamsi, David Z. Pan, Yier Jin |
| 2019 | ICCAD | MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper. | Biying Xu, Keren Zhu, Mingjie Liu, Yibo Lin, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2019 | ICCAD | Design Technology for Scalable and Robust Photonic Integrated Circuits: Invited Paper. | Zheng Zhao, Jiaqi Gu, Zhoufeng Ying, Chenghao Feng, Ray T. Chen, David Z. Pan |
| 2019 | ICCAD | GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance. | Keren Zhu, Mingjie Liu, Yibo Lin, Biying Xu, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan |
| 2018 | ASPDAC | Layout-dependent aging mitigation for critical path timing. | Che-Lun Hsu, Shaofeng Guo, Yibo Lin, Xiaoqing Xu, Meng Li, Runsheng Wang, Ru Huang, David Z. Pan |
| 2018 | ASPDAC | A practical split manufacturing framework for Trojan prevention via simultaneous wire lifting and cell insertion. | Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan |
| 2018 | ASPDAC | Logic synthesis for energy-efficient photonic integrated circuits. | Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan |
| 2018 | DAC | OPERON: optical-electrical power-efficient route synthesis for on-chip signals. | Derong Liu, Zheng Zhao, Zheng Wang, Zhoufeng Ying, Ray T. Chen, David Z. Pan |
| 2018 | DATE | TimingCamouflage: Improving circuit security against counterfeiting by unconventional timing. | Grace Li Zhang, Bing Li, Bei Yu, David Z. Pan, Ulf Schlichtmann |
| 2018 | ITC | TimingSAT: Decamouflaging Timing-based Logic Obfuscation. | Meng Li, Kaveh Shamsi, Yier Jin, David Z. Pan |
| 2018 | ITC | Machine Learning for Yield Learning and Optimization. | Yibo Lin, Mohamed Baker Alawieh, Wei Ye, David Z. Pan |
| 2017 | DAC | Cross-level Monte Carlo Framework for System Vulnerability Evaluation against Fault Attack. | Meng Li, Liangzhen Lai, Vikas Chandra, David Z. Pan |
| 2017 | DAC | Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. | Derong Liu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan |
| 2017 | DAC | Concurrent Pin Access Optimization for Unidirectional Routing. | Xiaoqing Xu, Yibo Lin, Vinicius S. Livramento, David Z. Pan |
| 2017 | DAC | A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology. | Biying Xu, Shaolan Li, Nan Sun, David Z. Pan |
| 2017 | ICCAD | UTPlaceF 3.0: A parallelization framework for modern FPGA global placement: (Invited paper). | Wuxi Li, Meng Li, Jiajun Wang, David Z. Pan |
| 2017 | ICCD | Patterning Aware Design Optimization of Selective Etching in N5 and Beyond. | Yibo Lin, Peter Debacker, Darko Trivkovic, Ryoung-Han Kim, Praveen Raghavan, David Z. Pan |
| 2017 | ICCD | DTCO for DSA-MP Hybrid Lithography with Double-BCP Materials in Sub-7nm Node. | Jiaojiao Ou, Xiaoqing Xu, Brian Cline, Greg Yeric, David Z. Pan |
| 2017 | ISCAS | Revisit sequential logic obfuscation: Attacks and defenses. | Travis Meade, Zheng Zhao, Shaojie Zhang, David Z. Pan, Yier Jin |
| 2017 | ISLPED | Placement mitigation techniques for power grid electromigration. | Wei Ye, Yibo Lin, Xiaoqing Xu, Wuxi Li, Yiwei Fu, Yongsheng Sun, Canhui Zhan, David Z. Pan |
| 2016 | ASPDAC | Stitch aware detailed placement for multiple e-beam lithography. | Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan |
| 2016 | ASPDAC | Laplacian eigenmaps and bayesian clustering based layout pattern sampling and its applications to hotspot detection and OPC. | Tetsuaki Matsunawa, Bei Yu, David Z. Pan |
| 2016 | DAC | Practical public PUF enabled by solving max-flow problem on chip. | Meng Li, Jin Miao, Kai Zhong, David Z. Pan |
| 2016 | DAC | Incremental layer assignment for critical path timing. | Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan |
| 2016 | ICCAD | Detailed placement for modern FPGAs using 2D dynamic programming. | Shounak Dhar, Saurabh N. Adya, Love Singhal, Mahesh A. Iyer, David Z. Pan |
| 2016 | ICCAD | UTPlaceF: a routability-driven FPGA placer with physical and congestion aware packing. | Wuxi Li, Shounak Dhar, David Z. Pan |
| 2016 | ICCAD | MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes. | Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan |
| 2016 | ICCAD | Provably secure camouflaging strategy for IC protection. | Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan |
| 2016 | ICCAD | A novel unified dummy fill insertion framework with SQP-based optimization method. | Yudong Tao, Changhao Yan, Yibo Lin, Sheng-Guo Wang, David Z. Pan, Xuan Zeng |
| 2015 | ASPDAC | Electromigration-aware redundant via insertion. | Jiwoo Pak, Bei Yu, David Z. Pan |
| 2015 | ASPDAC | Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs. | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
| 2015 | ASPDAC | Machine learning and pattern matching in physical design. | Bei Yu, David Z. Pan, Tetsuaki Matsunawa, Xuan Zeng |
| 2015 | DAC | High-level synthesis of error detecting cores through low-cost modulo-3 shadow datapaths. | Keith A. Campbell, Pranay Vissa, David Z. Pan, Deming Chen |
| 2015 | DAC | High performance dummy fill insertion with coupling and uniformity constraints. | Yibo Lin, Bei Yu, David Z. Pan |
| 2015 | DAC | Pushing multiple patterning in sub-10nm: are we ready? | David Z. Pan, Lars Liebmann, Bei Yu, Xiaoqing Xu, Yibo Lin |
| 2015 | DAC | OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions. | Subhendu Roy, Derong Liu, Junhyung Um, David Z. Pan |
| 2015 | DAC | PARR: pin access planning and regular routing for self-aligned double patterning. | Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan |
| 2015 | ICCAD | Toward Metrics of Design Automation Research Impact. | Andrew B. Kahng, Mulong Luo, Gi-Joon Nam, Siddhartha Nath, David Z. Pan, Gabriel Robins |
| 2015 | ICCAD | Triple Patterning Aware Detailed Placement Toward Zero Cross-Row Middle-of-Line Conflict. | Yibo Lin, Bei Yu, Biying Xu, David Z. Pan |
| 2015 | ICCAD | TILA: Timing-Driven Incremental Layer Assignment. | Bei Yu, Derong Liu, Salim Chowdhury, David Z. Pan |
| 2015 | ICCD | CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction. | Chen-Hsuan Lin, Subhendu Roy, Chun-Yao Wang, David Z. Pan, Deming Chen |
| 2014 | ASPDAC | Self-aligned double patterning layout decomposition with complementary e-beam lithography. | Jhih-Rong Gao, Bei Yu, David Z. Pan |
| 2014 | ASPDAC | BOB-router: A new buffering-aware global router with over-the-block routing resources optimization. | Yilin Zhang, Salim Chowdhury, David Z. Pan |
| 2014 | DAC | MOSAIC: Mask Optimizing Solution With Process Window Aware Inverse Correction. | Jhih-Rong Gao, Xiaoqing Xu, Bei Yu, David Z. Pan |
| 2014 | DAC | Layout Decomposition for Quadruple Patterning Lithography and Beyond. | Bei Yu, David Z. Pan |
| 2014 | VLSID | Reliability Aware Gate Sizing Combating NBTI and Oxide Breakdown. | Subhendu Roy, David Z. Pan |
| 2013 | ASPDAC | L-shape based layout fracturing for e-beam lithography. | Bei Yu, Jhih-Rong Gao, David Z. Pan |
| 2013 | DAC | An accurate semi-analytical framework for full-chip TSV-induced stress modeling. | Yang Li, David Z. Pan |
| 2013 | DAC | Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures. | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
| 2013 | DAC | E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system. | Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan |
| 2013 | ICCAD | Electromigration study for multi-scale power/ground vias in TSV-based 3D ICs. | Jiwoo Pak, Sung Kyu Lim, David Z. Pan |
| 2013 | ICCAD | Clock power minimization using structured latch templates and decision tree induction. | Samuel I. Ward, Natarajan Viswanathan, Nancy Y. Zhou, Cliff C. N. Sze, Zhuo Li, Charles J. Alpert, David Z. Pan |
| 2013 | ICCAD | A high-performance triple patterning layout decomposer with balanced density. | Bei Yu, Yen-Hung Lin, Gerard Luk-Pat, Duo Ding, Kevin Lucas, David Z. Pan |
| 2013 | ICCAD | Methodology for standard cell compliance and detailed placement for triple patterning lithography. | Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, David Z. Pan |
| 2012 | ASPDAC | EPIC: Efficient prediction of IC manufacturing hotspots with a unified meta-classification formulation. | Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan |
| 2012 | ASPDAC | GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing. | Duo Ding, Bei Yu, David Z. Pan |
| 2012 | ASPDAC | Design for manufacturability and reliability for TSV-based 3D ICs. | David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang |
| 2012 | ASPDAC | Robust and resilient designs from the bottom-up: Technology, CAD, circuit, and system issues. | Vijay Janapa Reddi, David Z. Pan, Sani R. Nassif, Keith A. Bowman |
| 2012 | DAC | Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs. | Moongon Jung, David Z. Pan, Sung Kyu Lim |
| 2012 | DAC | PADE: a high-performance placer with automatic datapath extraction and evaluation through high dimensional data learning. | Samuel I. Ward, Duo Ding, David Z. Pan |
| 2012 | ICCAD | TRIAD: A triple patterning lithography aware detailed router. | Yen-Hung Lin, Bei Yu, David Z. Pan, Yih-Lang Li |
| 2012 | ICCAD | Electromigration-aware routing for 3D ICs with stress-aware EM modeling. | Jiwoo Pak, Sung Kyu Lim, David Z. Pan |
| 2012 | ICCAD | Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper). | Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan |
| 2012 | ICCAD | Reclaiming over-the-IP-block routing resources with buffering-aware rectilinear Steiner minimum tree construction. | Yilin Zhang, Ashutosh Chakraborty, Salim Chowdhury, David Z. Pan |
| 2011 | ASPDAC | CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits. | Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli |
| 2011 | ASPDAC | Controlling NBTI degradation during static burn-in testing. | Ashutosh Chakraborty, David Z. Pan |
| 2011 | ASPDAC | High performance lithographic hotspot detection using hierarchically refined machine learning. | Duo Ding, Andres J. Torres, Fedor G. Pikus, David Z. Pan |
| 2011 | ASPDAC | Exploration of VLSI CAD researches for early design rule evaluation. | Chul-Hong Park, David Z. Pan, Kevin Lucas |
| 2011 | ASPDAC | Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs. | Jae-Seok Yang, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, David Z. Pan |
| 2011 | DAC | Flexible 2D layout decomposition framework for spacer-type double pattering lithography. | Yongchan Ban, Kevin Lucas, David Z. Pan |
| 2011 | DAC | AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection. | Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan |
| 2011 | DAC | TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC. | Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim |
| 2011 | ICCAD | Chemical-mechanical polishing aware application-specific 3D NoC design. | Wooyoung Jang, Ou He, Jae-Seok Yang, David Z. Pan |
| 2011 | ICCAD | Full-chip through-silicon-via interfacial crack analysis and optimization for 3D IC. | Moongon Jung, Xi Liu, Suresh K. Sitaraman, David Z. Pan, Sung Kyu Lim |
| 2011 | ICCAD | Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancing. | Yen-Hung Lin, Yongchan Ban, David Z. Pan, Yih-Lang Li |
| 2011 | ICCAD | Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs. | Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim |
| 2011 | ICCAD | Layout decomposition for triple patterning lithography. | Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan |
| 2010 | ASPDAC | A3MAP: architecture-aware analytic mapping for networks-on-chip. | Wooyoung Jang, David Z. Pan |
| 2010 | ASPDAC | A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography. | Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, David Z. Pan |
| 2010 | DAC | Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography. | Yongchan Ban, David Z. Pan |
| 2010 | DAC | Application-aware NoC design for efficient SDRAM access. | Wooyoung Jang, David Z. Pan |
| 2010 | DAC | TSV stress aware timing analysis with applications to 3D-IC layout optimization. | Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan |
| 2010 | ICCAD | Stress-driven 3D-IC placement with TSV keep-out zone and regularity study. | Krit Athikulwongse, Ashutosh Chakraborty, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim |
| 2010 | ICCAD | Novel binary linear programming for high performance clock mesh synthesis. | Minsik Cho, David Z. Pan, Ruchir Puri |
| 2010 | ICCAD | WISDOM: Wire spreading enhanced decomposition of masks in Double Patterning Lithography. | Kun Yuan, David Z. Pan |
| 2010 | ISLPED | PASAP: power aware structured ASIC placement. | Ashutosh Chakraborty, David Z. Pan |
| 2009 | DAC | RegPlace: a high quality open-source placement framework for structured ASICs. | Ashutosh Chakraborty, Anurag Kumar, David Z. Pan |
| 2009 | DAC | O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration. | Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, David Z. Pan |
| 2009 | DAC | An SDRAM-aware router for Networks-on-Chip. | Wooyoung Jang, David Z. Pan |
| 2009 | DAC | Double patterning lithography friendly detailed routing with redundant via consideration. | Kun Yuan, Katrina Lu, David Z. Pan |
| 2009 | DATE | Analysis and optimization of NBTI induced clock skew in gated clock trees. | Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram, David Z. Pan |
| 2008 | ASPDAC | Total power optimization combining placement, sizing and multi-Vt through slack distribution management. | Tao Luo, David Newmark, David Z. Pan |
| 2008 | ASPDAC | DPlace2.0: A stable and efficient analytical placement based on diffusion. | Tao Luo, David Z. Pan |
| 2008 | ASPDAC | Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond. | David Z. Pan, Minsik Cho |
| 2008 | ASPDAC | MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks. | Anand Rajaram, David Z. Pan |
| 2008 | DAC | An integrated nonlinear placement framework with congestion and porosity aware buffer planning. | Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pan |
| 2008 | DAC | ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
| 2008 | DAC | Robust chip-level clock tree synthesis for SOC designs. | Anand Rajaram, David Z. Pan |
| 2008 | DATE | Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices. | Ashutosh Chakraborty, Sean X. Shi, David Z. Pan |
| 2008 | DATE | Latch Modeling for Statistical Timing Analysis. | Sean X. Shi, Anand Ramalingam, Daifeng Wang, David Z. Pan |
| 2008 | ICCAD | Double patterning technology friendly detailed routing. | Minsik Cho, Yongchan Ban, David Z. Pan |
| 2008 | ICCAD | A voltage-frequency island aware energy optimization framework for networks-on-chip. | Wooyoung Jang, Duo Ding, David Z. Pan |
| 2008 | ICCAD | Pyramids: an efficient computational geometry-based approach for timing-driven placement. | Tao Luo, David A. Papa, Zhuo Li, Chin Ngai Sze, Charles J. Alpert, David Z. Pan |
| 2008 | ICCAD | Nanolithography and CAD challenges for 32nm/22nm and beyond. | David Z. Pan, Stephen Renwick, Vivek Singh, Judy Huckabay |
| 2008 | ICCAD | Overlay aware interconnect and timing variation modeling for double patterning technology. | Jae-Seok Yang, David Z. Pan |
| 2007 | ASPDAC | Hippocrates: First-Do-No-Harm Detailed Placement. | Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia |
| 2007 | DAC | TROY: Track Router with Yield-driven Wire Planning. | Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan |
| 2007 | DAC | Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis. | Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Michael Orshansky, David Z. Pan |
| 2007 | ICCAD | BoxRouter 2.0: architecture and implementation of a hybrid and robust global router. | Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan |
| 2007 | ICCAD | TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction. | Peng Yu, David Z. Pan |
| 2007 | ICCAD | A novel intensity based optical proximity correction algorithm with speedup in lithography simulation. | Peng Yu, David Z. Pan |
| 2006 | ASPDAC | Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs. | Minsik Cho, Hongjoong Shin, David Z. Pan |
| 2006 | ASPDAC | Robust analytical gate delay modeling for low voltage circuits. | Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan |
| 2006 | ASPDAC | Wire sizing with scattering effect for nanoscale interconnection. | Sean X. Shi, David Z. Pan |
| 2006 | DAC | BoxRouter: a new global router based on box expansion and progressive ILP. | Minsik Cho, David Z. Pan |
| 2006 | DAC | A new LP based incremental timing driven placement for high performance designs. | Tao Luo, David Newmark, David Z. Pan |
| 2006 | DAC | Process variation aware OPC with variational lithography modeling. | Peng Yu, Sean X. Shi, David Z. Pan |
| 2006 | ICCAD | Wire density driven global routing for CMP variation and timing. | Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri |
| 2006 | ICCAD | An accurate sparse matrix based framework for statistical static timing analysis. | Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan |
| 2006 | ICCAD | A unified non-rectangular device and circuit simulation model for timing and power. | Sean X. Shi, Peng Yu, David Z. Pan |
| 2006 | ICCD | Partial Functional Manipulation Based Wirelength Minimization. | Avijit Dutta, David Z. Pan |
| 2006 | VTS | PEAKASO: Peak-Temperature Aware Scan-Vector Optimization. | Minsik Cho, David Z. Pan |
| 2005 | ASPDAC | Sleep transistor sizing using timing criticality and temporal currents. | Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan |
| 2005 | ASPDAC | Redundant-via enhanced maze routing for yield improvement. | Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong |
| 2005 | ASPDAC | CMP aware shuttle mask floorplanning. | Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong |
| 2005 | ICCAD | TACO: temperature aware clock-tree optimization. | Minsik Cho, Suhail Ahmed, David Z. Pan |
| 2003 | DAC | Pushing ASIC performance in a power envelope. | Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni |