| 2007 | Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G). | Koichi Mori, Masakazu Suzuki, Yasuo Ohara, Satoru Matsuo, Atsushi Asano |
| 2007 | Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling. | Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee |
| 2007 | A 1Tb/s 3W Inductive-Coupling Transceiver Chip. | Noriyuki Miura, Tadahiro Kuroda |
| 2007 | Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method. | Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang |
| 2007 | Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic. | Shoun Matsunaga, Takahiro Hanyu, Hiromitsu Kimura, Takashi Nakamura, Hidemi Takasu |
| 2007 | Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. | Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou |
| 2007 | Voltage Island Generation under Performance Requirement for SoC Designs. | Wai-Kei Mak, Jr-Wei Chen |
| 2007 | Signal-to-Memory Mapping Analysis for Multimedia Signal Processing. | Ilie I. Luican, Hongwei Zhu, Florin Balasa |
| 2007 | On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design. | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
| 2007 | Retiming for Synchronous Data Flow Graphs. | Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee |
| 2007 | Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space. | Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng, John Lillis |
| 2007 | Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. | Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng |
| 2007 | A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield. | Bao Liu, Andrew B. Kahng, Xu Xu, Jiang Hu, Ganesh Venkataraman |
| 2007 | Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation. | Jiayi Liu, Sheqin Dong, Yuchun Ma, Di Long, Xianlong Hong |
| 2007 | A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications. | Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan |
| 2007 | A Retargetable Software Timing Analyzer Using Architecture Description Language. | Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra, Xu Cheng |
| 2007 | Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains. | Chuan Lin, Hai Zhou |
| 2007 | Recent Research and Emerging Challenges in Physical Design for Manufacturability/Reliability. | Chung-Wei Lin, Ming-Chao Tsai, Kuang-Yao Lee, Tai-Chen Chen, Ting-Chi Wang, Yao-Wen Chang |
| 2007 | Runtime leakage power estimation technique for combinational circuits. | Yu-Shiang Lin, Dennis Sylvester |
| 2007 | Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes. | Li-Chun Lin, Shih-Hao Ou, Tay-Jyi Lin, Siang-Den Deng, Chih-Wei Liu |
| 2007 | A Precise Bandwidth Control Arbitration Algorithm for Hard Real-Time SoC Buses. | Bu-Ching Lin, Geeng-Wei Lee, Juinn-Dar Huang, Jing-Yang Jou |
| 2007 | A High-Throughput Low-Power AES Cipher for Network Applications. | Shin-Yi Lin, Chih-Tsun Huang |
| 2007 | BddCut: Towards Scalable Symbolic Cut Enumeration. | Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown |
| 2007 | Multithreaded SAT Solving. | Matthew Lewis, Tobias Schubert, Bernd Becker |
| 2007 | Recognition of Fanout-free Functions. | Tsung-Lin Lee, Chun-Yao Wang |