| 2026 | ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework. | Qijun Zhang, Shang Liu, Yao Lu, Mengming Li, Zhiyao Xie |
| 2026 | BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference. | Wenlun Zhang, Xinyu Li, Shimpei Ando, Kentaro Yoshioka |
| 2026 | Accessible Ratio-Specific Mixing: Single-Pressure-Driven Multi-Reagent Mixer Design and Synthesis for 3D-Printed Microfluidics. | Yushen Zhang, Debraj Kundu, Tsun-Ming Tseng, Sudip Roy, Shigeru Yamashita, Ulf Schlichtmann |
| 2026 | FIawase: A SET Fault Injection Framework Towards Exhaustive System-Level Impact Evaluation. | Mingtao Zhang, Quan Cheng, Masanori Hashimoto |
| 2026 | MemSearch: An Efficient Memristive In-memory Search Engine with Configurable Similarity Measures. | Yingjie Yu, Houji Zhou, Jiancong Li, Tong Hu, Jia Chen, Yi Li, Xiangshui Miao |
| 2026 | CausalTuner: Will Causality Help High-Dimensional EDA Tool Parameter Tuning. | Ziyang Yu, Peng Xu, Su Zheng, Siyuan Xu, Hao Geng, Bei Yu, Martin D. F. Wong |
| 2026 | Advancing General Sparse Linear-Equation Solvers via Nested-Dissection-Based Parallel Scheduling and Randomized Linear Algebra. | Wenjian Yu, Jiawen Cheng, Baiyu Chen |
| 2026 | SMT-Based Optimal Transistor Folding and Placement for Standard Cell Layout Generation. | Junghyun Yoon, Heechun Park |
| 2026 | Standard Cell Layout Generation: Methodological Evolution and Architectural Impacts. | Junghyun Yoon, Ikkyum Kim, Gyumin Kim, Sojung Park, Heechun Park |
| 2026 | NBCache: An Efficient and Scalable Non-Blocking Cache for Coherent Multi-Chiplet Systems. | Zhirong Ye, Yongchang Zhang, Peilin Wang, Tao Lu, Zhaolin Li, Zhiyi Yu, Mingyu Wang |
| 2026 | Learnable Center-Based Quantization for Efficient Analog PIM with Reduced ADC Precision. | Sangheum Yeon, Jong Hwan Ko |
| 2026 | CDACiM: A Charge-Domain Compute-in-Memory Macro for FP/INT MAC Operations with Reconfigurable Capacitor Digital-Analog-Converter. | Jinting Yao, Zeyu Yang, Yuxiao Jiang, Yuxiao Yang, Zheyu Yan, Cheng Zhuo, Xunzhao Yin |
| 2026 | AutoCT: Hybrid Compressor Tree Optimization via Reinforcement Learning with Graph Modeling. | Shangshang Yao, Kunlong Li, Li Shen, Ruoxi Wang, Jingyu Liu |
| 2026 | Graph Attention-Based Current Crowding Analysis at TSV Interfaces in 3D Power Delivery Networks. | Zheng Yang, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim |
| 2026 | M3DKV: Monolithic 3D Gain Cell Memory Enabled Efficient KV Cache & Processing. | Jiaqi Yang, Yanbo Su, Yihan Fu, Jianshi Tang, Bonan Yan |
| 2026 | Code, Not Canvas: Multi-Agent Layout Generation Beyond Vision Models. | Haoyu Yang, Haoxing Ren |
| 2026 | Viper: An ILP-Based Vectorization Framework for Fully Homomorphic Encryption. | Weidong Yang, Xinmo Li, Xiangmin Guo, Jianfei Jiang, Naifeng Jing, Qin Wang, Zhigang Mao, Weiguang Sheng |
| 2026 | DOME: A Domain-Orchestrated Multi-GPU Optical Network for Rack-Scale Systems. | Chongyi Yang, Peiyu Chen, Bohan Hu, Yinyi Liu, Wei Zhang, Jiang Xu |
| 2026 | BALANCE: Bit and Layer-Aware Lightweight ECC Design Method for In-Flash Computing Based LLM Inference Accelerator. | Changwei Yan, Lishuo Deng, Mingbo Hao, Cai Li, Weiwei Shan |
| 2026 | MIMIC: Machine Intelligence for Scalable Generation of Synthetic Timing Cone Datasets. | Ajay Yadav, Vinodh Kumar Ramasamy, Juan Arturo Garza, Taylor Hannan, Mark Lee, Mahesh Sharma, Vidya A. Chhabria |
| 2026 | FESTAL: Dataflow Accelerator Synthesis Framework with Graph-Based Fusion for FPGA. | Ruifan Xu, Yuyang Zou, Yun Liang |
| 2026 | SpAct-NDP: Efficient LLM Inference via Sparse Activation on NDP-GPU Heterogeneous Architecture. | Jiaming Xu, Tongxin Xie, Yongkang Zhou, Jinhao Li, Yaoxiu Lian, Zhenhua Zhu, Yu Wang, Guohao Dai |
| 2026 | ANIMo: Accelerating Nested Isolation with Monitor-free Domain Transition. | Yibin Xu, Han Wang, Yue Jin, Tianyi Huang, Tianyue Lu, Mingyu Chen |
| 2026 | AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models. | Chenhao Xue, Kezhi Li, Jiaxing Zhang, Yi Ren, Zhengyuan Shi, Chen Zhang, Yibo Lin, Lining Zhang, Qiang Xu, Guangyu Sun |
| 2026 | CNN-Assisted Low-Power Clock Tree Synthesis for 3D ICs. | Chenbo Xi, Jindong Zhou, Pingqiang Zhou |