| 2023 | High-Dimensional Yield Estimation Using Shrinkage Deep Features and Maximization of Integral Entropy Reduction. | Shuo Yin, Guohao Dai, Wei W. Xing |
| 2023 | DPRoute: Deep Learning Framework for Package Routing. | Yeu-Haw Yeh, Simon Yi-Hung Chen, Hung-Ming Chen, Deng-Yao Tu, Guan-Qi Fang, Yun-Chih Kuo, Po-Yang Chen |
| 2023 | Graph-Learning-Driven Path-Based Timing Analysis Results Predictor from Graph-Based Timing Analysis. | Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi |
| 2023 | An Efficient near-Bank Processing Architecture for Personalized Recommendation System. | Yuqing Yang, Weidong Yang, Qin Wang, Naifeng Jing, Jianfei Jiang, Zhigang Mao, Weiguang Sheng |
| 2023 | Enabling Scalable AI Computational Lithography with Physics-Inspired Models. | Haoyu Yang, Haoxing Ren |
| 2023 | Improving the Robustness and Efficiency of PIM-Based Architecture by SW/HW Co-Design. | Xiaoxuan Yang, Shiyu Li, Qilin Zheng, Yiran Chen |
| 2023 | A Fully Synchronous Digital LDO with Built-in Adaptive Frequency Modulation and Implicit Dead-Zone Control. | Shun Yamaguchi, Mahfuzul Islam, Takashi Hisakado, Osami Wada |
| 2023 | Safety-Aware Flexible Schedule Synthesis for Cyber-Physical Systems Using Weakly-Hard Constraints. | Shengjie Xu, Bineet Ghosh, Clara Hobbs, P. S. Thiagarajan, Samarjit Chakraborty |
| 2023 | An Adaptive Partition Strategy of Galerkin Boundary Element Method for Capacitance Extraction. | Shengkun Wu, Biwei Xie, Xingquan Li |
| 2023 | Approximate Floating-Point FFT Design with Wide Precision-Range and High Energy Efficiency. | Chenyi Wen, Ying Wu, Xunzhao Yin, Cheng Zhuo |
| 2023 | An Equivalence Checking Framework for Agile Hardware Design. | Yanzhao Wang, Fei Xie, Zhenkun Yang, Pasquale Cocchini, Jin Yang |
| 2023 | A Robust FPGA Router with Concurrent Intra-CLB Rerouting. | Jiarui Wang, Jing Mai, Zhixiong Di, Yibo Lin |
| 2023 | Hardware Trojan Detection and High-Precision Localization in NoC-Based MPSoC Using Machine Learning. | Haoyu Wang, Basel Halak |
| 2023 | Static Probability Analysis Guided RTL Hardware Trojan Test Generation. | Haoyi Wang, Qiang Zhou, Yici Cai |
| 2023 | Quantum Data Compression for Efficient Generation of Control Pulses. | Daniel Volya, Prabhat Mishra |
| 2023 | Hardware-Software Co-Design for On-Chip Learning in AI Systems. | M. Lakshmi Varshika, Abhishek Kumar Mishra, Nagarajan Kandasamy, Anup Das |
| 2023 | An Exact Schedulability Analysis for Global Fixed-Priority Scheduling of the AER Task Model. | Thilanka Thilakasiri, Matthias Becker |
| 2023 | FLOW-3D: Flow-Based Computing on 3D Nanoscale Crossbars with Minimal Semiperimeter. | Sven Thijssen, Sumit Kumar Jha, Rickard Ewetz |
| 2023 | A Low-Bitwidth Integer-STBP Algorithm for Efficient Training and Inference of Spiking Neural Networks. | Pai-Yu Tan, Cheng-Wen Wu |
| 2023 | A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS. | Rei Sumikawa, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda |
| 2023 | A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees Using Matrix Exponential. | Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis |
| 2023 | DECC: Differential ECC for Read Performance Optimization on High-Density NAND Flash Memory. | Yunpeng Song, Yina Lv, Liang Shi |
| 2023 | Iris: Automatic Generation of Efficient Data Layouts for High Bandwidth Utilization. | Stephanie Soldavini, Donatella Sciuto, Christian Pilato |
| 2023 | Hardware Security Primitives Using Passive RRAM Crossbar Array: Novel TRNG and PUF Designs. | Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant |
| 2023 | SecHLS: Enabling Security Awareness in High-Level Synthesis. | Shang Shi, Nitin Pundir, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi |