| 2023 | AutoFlex: Unified Evaluation and Design Framework for Flexible Hybrid Electronics. | Tianliang Ma, Zhihui Deng, Leilai Shao |
| 2023 | Learning Based Spatial Power Characterization and Full-Chip Power Estimation for Commercial TPUs. | Jincong Lu, Jinwei Zhang, Wentian Jin, Sachin Sachdeva, Sheldon X.-D. Tan |
| 2023 | Quantization through Search: A Novel Scheme to Quantize Convolutional Neural Networks in Finite Weight Space. | Qing Lu, Weiwen Jiang, Xiaowei Xu, Jingtong Hu, Yiyu Shi |
| 2023 | Skyrmion Vault: Maximizing Skyrmion Lifespan for Enabling Low-Power Skyrmion Racetrack Memory. | Syue-Wei Lu, Shuo-Han Chen, Yu-Pei Liang, Yuan-Hao Chang, Kang Wang, Tseng-Yi Chen, Wei-Kuan Shih |
| 2023 | Toward Energy-Efficient Sparse Matrix-Vector Multiplication with near STT-MRAM Computing Architecture. | Yueting Li, He Zhang, Xueyan Wang, Hao Cai, Yundong Zhang, Shuqin Lv, Renguang Liu, Weisheng Zhao |
| 2023 | Block-Wise Dynamic-Precision Neural Network Training Acceleration via Online Quantization Sensitivity Analytics. | Ruoyang Liu, Chenhan Wei, Yixiong Yang, Wenxun Wang, Huazhong Yang, Yongpan Liu |
| 2023 | Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach. | Bosheng Liu, Hongyi Liang, Jigang Wu, Xiaoming Chen, Peng Liu, Yinhe Han |
| 2023 | A Robust Approach to Detecting Non-Equivalent Quantum Circuits Using Specially Designed Stimuli. | Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang |
| 2023 | Towards High-Bandwidth-Utilization SpMV on FPGAs via Partial Vector Duplication. | Bowen Liu, Dajiang Liu |
| 2023 | Safety-Driven Interactive Planning for Neural Network-Based Lane Changing. | Xiangguo Liu, Ruochen Jiao, Bowen Zheng, Dave Liang, Qi Zhu |
| 2023 | MIA-Aware Detailed Placement and VT Reassignment for Leakage Power Optimization. | Hung-Chun Lin, Shao-Yun Fang |
| 2023 | Parallel Incomplete LU Factorization Based Iterative Solver for Fixed-Structure Linear Equations in Circuit Simulation. | Lingjie Li, Zhiqiang Liu, Kan Liu, Shan Shen, Wenjian Yu |
| 2023 | WIT-Greedy: Hardware System Design of Weighted ITerative Greedy Decoder for Surface Code. | Wang Liao, Yasunari Suzuki, Teruo Tanimoto, Yosuke Ueno, Yuuki Tokunaga |
| 2023 | Efficient System-Level Design Space Exploration for High-Level Synthesis Using Pareto-Optimal Subspace Pruning. | Yuchao Liao, Tosiron Adegbija, Roman Lysecky |
| 2023 | BufFormer: A Generative ML Framework for Scalable Buffering. | Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing Ren |
| 2023 | DependableHD: A Hyperdimensional Learning Framework for Edge-Oriented Voltage-Scaled Circuits. | Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi |
| 2023 | Approximate Logic Synthesis by Genetic Algorithm with an Error Rate Guarantee. | Chun-Ting Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang |
| 2023 | EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation. | Rune Krauss, Mehran Goli, Rolf Drechsler |
| 2023 | FPGA Based Countermeasures against Side Channel Attacks on Block Ciphers. | Darshana Jayasinghe, Brian Udugama, Sri Parameswaran |
| 2023 | Demonstration of Order Statistics Based Flash ADC in a 65nm Process. | Mahfuzul Islam, Takehiro Kitamura, Takashi Hisakado, Osami Wada |
| 2023 | Graph Partitioning Approach for Fast Quantum Circuit Simulation. | Jaekyung Im, Seokhyeong Kang |
| 2023 | Decoupling Capacitor Insertion Minimizing IR-Drop Violations and Routing DRVs. | Daijoon Hyun, Younggwang Jung, Insu Cho, Youngsoo Shin |
| 2023 | Exploring Architectural Implications to Boost Performance for in-NVM B+-Tree. | Yanpeng Hu, Qisheng Jiang, Chundong Wang |
| 2023 | Optimizing Data Layout for Racetrack Memory in Embedded Systems. | Peng Hui, Edwin H.-M. Sha, Qingfeng Zhuge, Rui Xu, Han Wang |
| 2023 | Accelerated Capacitance Simulation of 3-D Structures with Considerable Amounts of General Floating Metals. | Jiechen Huang, Wenjian Yu, Mingye Song, Ming Yang |