| 2019 | HAMPER: high-performance adaptive mobile security enhancement against malicious speech and image recognition. | Zirui Xu, Fuxun Yu, Chenchen Liu, Xiang Chen |
| 2019 | Exploring emerging CNFET for efficient last level cache design. | Dawen Xu, Li Li, Ying Wang, Cheng Liu, Huawei Li |
| 2019 | Layout recognition attacks on split manufacturing. | Wenbin Xu, Lang Feng, Jeyavijayan Rajendran, Jiang Hu |
| 2019 | CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. | Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li |
| 2019 | Mosaic: an automated synthesis flow for boolean logic based on memristor crossbar. | Lei Xie |
| 2019 | FPGA laboratory system supporting power measurement for low-power digital design. | Marco Winzker, Andrea Schwandt |
| 2019 | Towards cognitive obfuscation: impeding hardware reverse engineering based on psychological insights. | Carina Wiesen, Nils Albartus, Max Hoffmann, Steffen Becker, Sebastian Wallat, Marc Fyrbiak, Nikol Rummel, Christof Paar |
| 2019 | An N-way group association architecture and sparse data group association load balancing algorithm for sparse CNN accelerators. | Jingyu Wang, Zhe Yuan, Ruoyang Liu, Huazhong Yang, Yongpan Liu |
| 2019 | Aging-aware chip health prediction adopting an innovative monitoring strategy. | Yun-Ting Wang, Kai-Chiang Wu, Chung-Han Chou, Shih-Chieh Chang |
| 2019 | ReRAM-based processing-in-memory architecture for blockchain platforms. | Fang Wang, Zhaoyan Shen, Lei Han, Zili Shao |
| 2019 | Bidirectional tuning of microring-based silicon photonic transceivers for optimal energy efficiency. | Yuyang Wang, M. Ashkan Seyedi, Jared Hulme, Marco Fiorentino, Raymond G. Beausoleil, Kwang-Ting Cheng |
| 2019 | A sharing-aware L1.5D cache for data reuse in GPGPUs. | Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing |
| 2019 | Scalable design for field-coupled nanocomputing circuits. | Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Groe, Rolf Drechsler |
| 2019 | Suspect2vec: a suspect prediction model for directed RTL debugging. | Neil Veira, Zissis Poulos, Andreas G. Veneris |
| 2019 | IR-ATA: IR annotated timing analysis, a flow for closing the loop between PDN design, IR analysis & timing closure. | Ashkan Vakil, Houman Homayoun, Avesta Sasan |
| 2019 | Latency constraint guided buffer sizing and layer assignment for clock trees with useful skew. | Necati Uysal, Wen-Hao Liu, Rickard Ewetz |
| 2019 | Testing stuck-open faults of priority address encoder in content addressable memories. | Tsai-Ling Tsai, Jin-Fu Li, Chun-Lung Hsu, Chi-Tien Sun |
| 2019 | Accelerate pattern recognition for cyber security analysis. | Mohammad Tahghighi, Wei Zhang |
| 2019 | SeFAct: selective feature activation and early classification for CNNs. | Farhana Sharmin Snigdha, Ibrahim Ahmed, Susmita Dey Manasi, Meghna G. Mankalale, Jiang Hu, Sachin S. Sapatnekar |
| 2019 | Log-quantized stochastic computing for memory and computation efficient DNNs. | Hyeon Uk Sim, Jongeun Lee |
| 2019 | XOMA: exclusive on-chip memory architecture for energy-efficient deep learning acceleration. | Hyeon Uk Sim, Jason Helge Anderson, Jongeun Lee |
| 2019 | BeSAT: behavioral SAT-based attack on cyclic logic encryption. | Yuanqi Shen, You Li, Amin Rezaei, Shuyu Kong, David Dlott, Hai Zhou |
| 2019 | A 0.16pJ/bit recurrent neural network based PUF for enhanced machine learning attack resistance. | Nimesh Shah, Manaar Alam, Durga Prasad Sahoo, Debdeep Mukhopadhyay, Arindam Basu |
| 2019 | A high-level modeling and simulation approach using test-driven cellular automata for fast performance analysis of RTL NoC designs. | Moon Gi Seok, Hessam S. Sarjoughian, Daejin Park |
| 2019 | Factorization based dilution of biochemical fluids with micro-electrode-dot-array biochips. | Sohini Saha, Debraj Kundu, Sudip Roy, Sukanta Bhattacharjee, Krishnendu Chakrabarty, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya |