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IEEE/ACM International Symposium on Low Power Electronics and Design

ISLPED

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering · Applied Computing

Papers indexed

2,128

1995–2026

Papers per year

199595 peak2026

ISLPED papers

2,128 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits.Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye
2008Low power current mode receiver with inductive input impedance.Marshnil Vipin Dave, Maryam Shojaei Baghini, Dinesh Kumar Sharma
2008Proactive temperature management in MPSoCs.Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross
2008A framework for energy consumption based design space exploration for wireless sensor nodes.Sonali Chouhan, M. Balakrishnan, Ranjan Bose
2008Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling.Youngjin Cho, Younghyun Kim, Yongsoo Joo, Kyungsoo Lee, Naehyuck Chang
2008Power-gating-aware high-level synthesis.Eunjoo Choi, Changsik Shin, Taewhan Kim, Youngsoo Shin
2008Caching for bursts (C-Burst): let hard disks sleep well and work energetically.Feng Chen, Xiaodong Zhang
2008Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies.Xuning Chen, Gu-Yeon Wei, Li-Shiuan Peh
2008Expected system energy consumption minimization in leakage-aware DVS systems.Jian-Jia Chen, Lothar Thiele
2008Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits.Andrea Calimera, R. Iris Bahar, Enrico Macii, Massimo Poncino
2008Low power design under parameter variations.Swarup Bhunia, Kaushik Roy
2008Low power chips: a fabless asic perspective.Shashank Bhonge, Vamsi Boppana
2008Reliability-centric gate sizing with simultaneous optimization of soft error rate, delay and power.Koustav Bhattacharya, Nagarajan Ranganathan
2008Full-system chip multiprocessor power evaluations using FPGA-based emulation.Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi
2008Advances in low power verification.Janick Bergeron
2008A 1.8/2.4-ghz dualband cmos low noise amplifier using miller capacitance tuning.Depak Balemarthy, Roy Paily
2008Power delivery for high performance microprocessors.Srikanth Balasubramanian
2008Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation.Shagun Bajoria, Vineet Kumar Singh, Raju Kunde, Chetan D. Parikh
2008On the rules of low-power design (and how to break them).Todd M. Austin
2008Power reduction in on-chip interconnection network by serialization.Arvind Madan, Bharadwaj Amrutur
2008On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers.Hamed Aminzadeh, Khalil Mafinezhad
2008Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion.Charbel J. Akl, Magdy A. Bayoumi
2008Towards a green electronic world: a collaborative approach.Jaswinder Ahuja
2008A tutorial on test power.Vishwani D. Agrawal
2008Error-resilient low-power Viterbi decoders.Rami A. Abdallah, Naresh R. Shanbhag
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