| 2007 | A process variation aware low power synthesis methodology for fixed-point FIR filters. | Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy |
| 2007 | Compact modeling of carbon nanotube transistor for early stage process-design exploration. | Asha Balijepalli, Saurabh Sinha, Yu Cao |
| 2007 | Design of an efficient power delivery network in an soc to enable dynamic power management. | Behnam Amelifard, Massoud Pedram |
| 2006 | Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids. | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula |
| 2006 | Synergistic temperature and energy management in GALS processor architectures. | Yongkang Zhu, David H. Albonesi |
| 2006 | A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs. | Jianwei Zhang, Yizheng Ye, Bin-Da Liu |
| 2006 | Register file caching for energy efficiency. | Hui Zeng, Kanad Ghose |
| 2006 | Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power. | Hao Yu, Yiyu Shi, Lei He, Tanay Karnik |
| 2006 | A novel dynamic power cutoff technique (DPCT) for active leakage reduction in deep submicron CMOS circuits. | Baozhen Yu, Michael L. Bushnell |
| 2006 | Flexibility and low power: a contradiction in terms? | Peter Wintermayr, Reiner W. Hartenstein, Heinrich Meyr, Steve Leibson |
| 2006 | Thread-associative memory for multicore and multithreaded computing. | Shuo Wang, Lei Wang |
| 2006 | Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits. | Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang |
| 2006 | Energy-efficient motion estimation using error-tolerance. | Girish Varatkar, Naresh R. Shanbhag |
| 2006 | An energy-efficient virtual memory system with flash memory as the secondary storage. | Hung-Wei Tseng, Han-Lin Li, Chia-Lin Yang |
| 2006 | A 0.5-V FD-SOI twin-cell DRAM with offset-free dynamic-V | Riichiro Takemura, Kiyoo Itoh, Tomonori Sekiguchi |
| 2006 | Everlast: long-life, supercapacitor-operated wireless sensor node. | Farhan Simjee, Pai H. Chou |
| 2006 | A low power SRAM architecture based on segmented virtual grounding. | Mohammad Sharifkhani, Manoj Sachdev |
| 2006 | A novel power optimization technique for ultra-low power RFICs. | Amin Shameli, Payam Heydari |
| 2006 | Efficient scan-based BIST scheme for low power testing of VLSI chips. | Malav Shah |
| 2006 | Energy-efficient dynamic instruction scheduling logic through instruction grouping. | Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura |
| 2006 | Low power light-weight embedded systems. | Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Tammara Massey, Ani Nahapetian |
| 2006 | L-CBF: a low-power, fast counting bloom filter architecture. | Elham Safi, Andreas Moshovos, Andreas G. Veneris |
| 2006 | Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm). | Samuel Rodrguez, Bruce L. Jacob |
| 2006 | Dynamic current modeling at the instruction level. | Jose Rizo-Morente, Miguel Casas-Sanchez, Chris J. Bleakley |
| 2006 | Modelling macromodules for high-level dynamic power estimation of FPGA-based digital designs. | Axel Reimer, Arne Schulz, Wolfgang Nebel |