| 2005 | A non-uniform cache architecture for low power system design. | Tohru Ishihara, Farzan Fallah |
| 2005 | Energy efficient strategies for deployment of a two-level wireless sensor network. | Ali Iranli, Morteza Maleki, Massoud Pedram |
| 2005 | Improving energy efficiency by making DRAM less randomly accessed. | Hai Huang, Kang G. Shin, Charles Lefurgy, Tom W. Keller |
| 2005 | The need for a full-chip and package thermal model for thermally optimized IC designs. | Wei Huang, Eric Humenay, Kevin Skadron, Mircea R. Stan |
| 2005 | An 8.3GHz dual supply/threshold optimized 32b integer ALU-register file loop in 90nm CMOS. | Steven Hsu, Amit Agarwal, Kaushik Roy, Ram Krishnamurthy, Shekhar Borkar |
| 2005 | Inter-program optimizations for conserving disk energy. | Jerry Hom, Ulrich Kremer |
| 2005 | Replacing global wires with an on-chip network: a power analysis. | Seongmoo Heo, Krste Asanovic |
| 2005 | Challenges and opportunities for low power FPGAs in nanometer technologies. | Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton |
| 2005 | LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. | Hassan Hassan, Mohab Anis, Mohamed I. Elmasry |
| 2005 | PARE: a power-aware hardware data prefetching engine. | Yao Guo, Mahmoud Ben Naser, Csaba Andras Moritz |
| 2005 | FinFET-based SRAM design. | Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic |
| 2005 | An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. | Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri |
| 2005 | Multi-story power delivery for supply noise reduction and low voltage operation. | Jie Gu, Chris H. Kim |
| 2005 | Fast configurable-cache tuning with a unified second-level cache. | Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt |
| 2005 | An energy efficient TLB design methodology. | Dongrui Fan, Zhimin Tang, Hailin Huang, Guang R. Gao |
| 2005 | Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy. | Alireza Ejlali, Marcus T. Schmitz, Bashir M. Al-Hashimi, Seyed Ghassem Miremadi, Paul M. Rosinger |
| 2005 | Power reduction by varying sampling rate. | William R. Dieter, Srabosti Datta, Wong Key Kai |
| 2005 | Probabilistic dual-Vth leakage optimization under variability. | Azadeh Davoodi, Ankur Srivastava |
| 2005 | Power prediction for intel XScale processors using performance monitoring unit events. | Gilberto Contreras, Margaret Martonosi |
| 2005 | Understanding the energy efficiency of SMT and CMP with multiclustering. | Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir |
| 2005 | Linear programming for sizing, V | David G. Chinnery, Kurt Keutzer |
| 2005 | Cascaded carry-select adder (C | Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh |
| 2005 | Dataflow analysis for energy-efficient scratch-pad memory management. | Guangyu Chen, Mahmut T. Kandemir |
| 2005 | A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13m CMOS. | Xinhua Chen, Qiuting Huang |
| 2005 | Region-level approximate computation reuse for power reduction in multimedia applications. | Xueqi Cheng, Michael S. Hsiao |