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IEEE International Symposium on Performance Analysis of Systems and Software

ISPASS

B

CORE rank

CORE rank (raw)

B

Fields of research

Software Engineering

Papers indexed

891

2000–2026

Papers per year

200065 peak2026

ISPASS papers

891 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2005EEMBC and the Purposes of Embedded Processor Benchmarking.Markus Levy
2005Reaping the Benefit of Temporal Silence to Improve Communication Performance.Kevin M. Lepak, Mikko H. Lipasti
2005The Strong correlation Between Code Signatures and Performance.Jeremy Lau, Jack Sampson, Erez Perelman, Greg Hamerly, Brad Calder
2005Motivation for Variable Length Intervals and Hierarchical Phase Behavior.Jeremy Lau, Erez Perelman, Greg Hamerly, Timothy Sherwood, Brad Calder
2005Performance Characterization of Java Applications on SMT Processors.Wei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang
2005Performance Analysis of a New Packet Trace Compressor based on TCP Flow Clustering.Raimir Holanda, Javier Verd, Jorge Garca-Vidal, Mateo Valero
2005Architectural Characterization of Processor Affinity in Network Processing.Annie P. Foong, Jason Fung, Donald Newell, Seth Abraham, Peggy Irelan, Alex Lopez-Estrada
2005Partitioning Multi-Threaded Processors with a Large Number of Threads.Ali El-Moursy, Rajeev Garg, David H. Albonesi, Sandhya Dwarkadas
2005Enhancing Multiprocessor Architecture Simulation Speed Using Matched-Pair Comparison.Magnus Ekman, Per Stenstrm
2005Insight, not (random) numbers.Thomas M. Conte
2005PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis.Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge
2005A Trace-Driven Simulator For Palm OS Devices.Hyrum Carroll, J. Kelly Flanagan, Satish Baniya
2005Dataflow: A Complement to Superscalar.Mihai Budiu, Pedro V. Artigas, Seth Copen Goldstein
2005Accelerating Multiprocessor Simulation with a Memory Timestamp Record.Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic
2005On the provision of prioritization and soft qos in dynamically reconfigurable shared data-centers over infiniband.Pavan Balaji, Sundeep Narravula, Karthikeyan Vaidyanathan, Hyun-Wook Jin, Dhabaleswar K. Panda
2005Balancing Performance and Reliability in the Memory Hierarchy.Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Tahoori, David R. Kaeli
2005Panel Discussion: Architectures for the Future.Erik R. Altman
2005BioBench: A Benchmark Suite of Bioinformatics Applications.Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung
2004Performance evaluation of exclusive cache hierarchies.Ying Zheng, Brian T. Davis, Matthew Jordan
2004Using cache mapping to improve memory performance handheld devices.Rong Xu, Zhiyuan Li
2004Architectures and compilers for multimedia.W. Wolf
2004Eccentric and fragile benchmarks.Hans Vandierendonck, Koen De Bosschere
2004Dynamically reducing pressure on the physical register file through simple register sharing.Liem Tran, Nicholas Nelson, Fung Ngai, Steve Dropsho, Michael C. Huang
2004Communication breakdown: analyzing CPU usage in commercial Web workloads.Jaidev P. Patwardhan, Alvin R. Lebeck, Daniel J. Sorin
2004Opening and keynote 1.Yale N. Patt
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