International Symposium on Microarchitecture
MICRO
A*
CORE rank
CORE rank (raw)
A*
Acceptance rate
21.0% (2023)
Fields of research
Computer Systems Engineering
Papers indexed
2,401
1972–2025
Papers per year
1972123 peak2025
Most published authors
MICRO papers
2,401 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2019 | Exploiting Process Similarity of 3D Flash Memory for High Performance SSDs. | Youngseop Shim, Myungsuk Kim, Myoungjun Chun, Jisung Park, Yoona Kim, Jihong Kim |
| 2019 | Applying Deep Learning to the Cache Replacement Problem. | Zhan Shi, Xiangru Huang, Akanksha Jain, Calvin Lin |
| 2019 | μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators. | Amirali Sharifian, Reza Hojabr, Navid Rahimi, Sihao Liu, Apala Guha, Tony Nowatzki, Arrvindh Shriraman |
| 2019 | Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. | Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler |
| 2019 | Architectural Implications of Function-as-a-Service Computing. | Mohammad Shahrad, Jonathan Balkind, David Wentzlaff |
| 2019 | EMMA: Hardware/Software Attestation Framework for Embedded Systems Using Electromagnetic Signals. | Nader Sehatbakhsh, Alireza Nazari, Haider Adnan Khan, Alenka G. Zajic, Milos Prvulovic |
| 2019 | S4NOC: a minimalistic network-on-chip for real-time multicores. | Martin Schoeberl, Luca Pezzarossa, Jens Spars |
| 2019 | Practical Byte-Granular Memory Blacklisting using Califorms. | Hiroshi Sasaki, Miguel A. Arroyo, M. Tarek Ibn Ziad, Koustubha Bhat, Kanad Sinha, Simha Sethumadhavan |
| 2019 | CleanupSpec: An "Undo" Approach to Safe Speculation. | Gururaj Saileshwar, Moinuddin K. Qureshi |
| 2019 | eAP: A Scalable and Efficient In-Memory Accelerator for Automata Processing. | Elaheh Sadredini, Reza Rahimi, Vaibhav Verma, Mircea Stan, Kevin Skadron |
| 2019 | Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization. | Fazle Sadi, Joe Sweeney, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti |
| 2019 | Tangram: Integrated Control of Heterogeneous Computers. | Raghavendra Pradyumna Pothukuchi, Joseph L. Greathouse, Karthik Rao, Christopher Erb, Leonardo Piga, Petros G. Voulgaris, Josep Torrellas |
| 2019 | MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation. | Lillian Pentecost, Marco Donato, Brandon Reagen, Udit Gupta, Siming Ma, Gu-Yeon Wei, David Brooks |
| 2019 | Your hardware is all wired up!: attacking network-on-chips via crosstalk channel. | Ahmad Patooghy, Maral Filvan Torkaman, Mehdi Elahi |
| 2019 | SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution. | Mayank Parasar, Natalie D. Enright Jerger, Paul V. Gratz, Joshua San Miguel, Tushar Krishna |
| 2019 | Quantifying Memory Underutilization in HPC Systems and Using it to Improve Performance via Architecture Support. | Gagandeep Panwar, Da Zhang, Yihan Pang, Mai Dahshan, Nathan DeBardeleben, Binoy Ravindran, Xun Jian |
| 2019 | SSP: Eliminating Redundant Writes in Failure-Atomic NVRAMs via Shadow Sub-Paging. | Yuanjiang Ni, Jishen Zhao, Heiner Litz, Daniel Bittman, Ethan L. Miller |
| 2019 | Directed Statistical Warming through Time Traveling. | Nikos Nikoleris, Lieven Eeckhout, Erik Hagersten, Trevor E. Carlson |
| 2019 | GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. | Anirban Nag, C. N. Ramachandra, Rajeev Balasubramonian, Ryan Stutsman, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon |
| 2019 | PHI: Architectural Support for Synchronization- and Bandwidth-Efficient Commutative Scatter Updates. | Anurag Mukkara, Nathan Beckmann, Daniel Snchez |
| 2019 | Adding Tightly-Integrated Task Scheduling Acceleration to a RISC-V Multi-core Processor. | Lucas Morais, Vitor Silva, Alfredo Goldman, Carlos lvarez, Jaume Bosch, Michael Frank, Guido Araujo |
| 2019 | Prefetched Address Translation. | Artemiy Margaritov, Dmitrii Ustiugov, Edouard Bugnion, Boris Grot |
| 2019 | DeepStore: In-Storage Acceleration for Intelligent Queries. | Vikram Sharma Mailthody, Zaid Qureshi, Weixin Liang, Ziyan Feng, Simon Garcia De Gonzalo, Youjie Li, Hubertus Franke, Jinjun Xiong, Jian Huang, Wen-Mei Hwu |
| 2019 | Binary Star: Coordinated Reliability in Heterogeneous Memory Systems for High Performance and Scalability. | Xiao Liu, David Roberts, Rachata Ausavarungnirun, Onur Mutlu, Jishen Zhao |
| 2019 | FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory. | Zhaoshi Li, Leibo Liu, Yangdong Deng, Jiawei Wang, Zhiwei Liu, Shouyi Yin, Shaojun Wei |
651–675 of 2,401← PreviousNext →
Comparable venues
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