International Symposium on Microarchitecture

MICRO

CORE rank

CORE rank (raw)

Acceptance rate

21.0% (2023)

Fields of research

Computer Systems Engineering

Papers indexed

2,401

1972–2025

Best Computer Systems Engineering conferences

Papers per year

1972123 peak2025

Most published authors

MICRO papers

2,401 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2016	C	Cheng-Chieh Huang, Rakesh Kumar, Marco Elver, Boris Grot, Vijay Nagarajan
2016	Continuous runahead: Transparent hardware acceleration for memory intensive workloads.	Milad Hashemi, Onur Mutlu, Yale N. Patt
2016	Improving energy efficiency of DRAM by exploiting half page row access.	Heonjae Ha, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz
2016	Graphicionado: A high-performance and energy-efficient accelerator for graph analytics.	Tae Jun Ham, Lisa Wu, Narayanan Sundaram, Nadathur Satish, Margaret Martonosi
2016	KLAP: Kernel launch aggregation and promotion for optimizing dynamic parallelism.	Izzat El Hajj, Juan Gmez-Luna, Cheng Li, Li-Wen Chang, Dejan S. Milojicic, Wen-mei W. Hwu
2016	NeSC: Self-virtualizing nested storage controller.	Yonatan Gottesman, Yoav Etsion
2016	HARE: Hardware accelerator for regular expressions.	Vaibhav Gogte, Aasheesh Kolli, Michael J. Cafarella, Loris D'Antoni, Thomas F. Wenisch
2016	Jump over ASLR: Attacking branch predictors to bypass ASLR.	Dmitry Evtyushkin, Dmitry V. Ponomarev, Nael B. Abu-Ghazaleh
2016	MIMD synchronization on SIMT architectures.	Ahmed ElTantawy, Tor M. Aamodt
2016	Dynamic error mitigation in NoCs using intelligent prediction techniques.	Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri
2016	Reconfigurable Links for Self-Timed On-Chip Communication.	Shomit Das, Greg Sadowski
2016	SABRes: Atomic object reads for in-memory rack-scale computing.	Alexandros Daglis, Dmitrii Ustiugov, Stanko Novakovic, Edouard Bugnion, Babak Falsafi, Boris Grot
2016	A patch memory system for image processing and computer vision.	Jason Clemons, Chih-Chi Cheng, Iuri Frosio, Daniel R. Johnson, Stephen W. Keckler
2016	CANDY: Enabling coherent DRAM caches for multi-node systems.	Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi
2016	Bridging the I/O performance gap for big data workloads: A new NVDIMM-based approach.	Renhai Chen, Zili Shao, Tao Li
2016	Efficient data supply for hardware accelerators with prefetching and access/execute decoupling.	Tao Chen, G. Edward Suh
2016	Efficient kernel synthesis for performance portable programming.	Li-Wen Chang, Izzat El Hajj, Christopher I. Rodrigues, Juan Gmez-Luna, Wen-mei W. Hwu
2016	A cloud-scale acceleration architecture.	Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger
2016	Fused-layer CNN accelerators.	Manoj Alwani, Han Chen, Michael Ferdman, Peter A. Milder
2016	Lazy release consistency for GPUs.	Johnathan Alsop, Marc S. Orr, Bradford M. Beckmann, David A. Wood
2015	Adaptive guardband scheduling to improve system-level efficiency of the POWER7+.	Yazhou Zu, Charles R. Lefurgy, Jingwen Leng, Matthew Halpern, Michael S. Floyd, Vijay Janapa Reddi
2015	Microarchitectural implications of event-driven server-side web applications.	Yuhao Zhu, Daniel Richins, Matthew Halpern, Vijay Janapa Reddi
2015	Fork path: improving efficiency of ORAM by removing redundant memory accesses.	Xian Zhang, Guangyu Sun, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di
2015	Exploiting commutativity to reduce the cost of updates to shared data in cache-coherent systems.	Guowei Zhang, Webb Horn, Daniel Snchez
2015	IMP: indirect memory prefetcher.	Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Srinivas Devadas

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