| 2004 | DSP Code Generation with Optimized Data Word-Length Selection. | Daniel Mnard, Olivier Sentieys |
| 2004 | A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor. | Sheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min |
| 2004 | Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition. | Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya |
| 2004 | Fast Points-to Analysis for Languages with Structured Types. | Michael Jung, Sorin A. Huss |
| 2004 | Suppression of Redundant Operations in Reverse Compiled Code Using Global Dataflow Analysis. | Adrian Johnstone, Elizabeth Scott |
| 2004 | Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units. | Diviya Jain, Anshul Kumar, Laura Pozzi, Paolo Ienne |
| 2004 | Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization. | Heiko Falk, Manish Verma |
| 2004 | Instruction Selection for Compilers that Target Architectures with Echo Instructions. | Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh |
| 2004 | Predictable Embedded Multiprocessor System Design. | Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman, Milan Pastrnak, Jef L. van Meerbergen |
| 2004 | A Fuzzy Adaptive Algorithm for Fine Grained Cache Paging. | Susmit Bagchi, Mads Nygaard |
| 2003 | Limited Address Range Architecture for Reducing Code Size in Embedded Processors. | Qin Zhao, Bart Mesman, Henk Corporaal |
| 2003 | Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. | Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie |
| 2003 | Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer. | Gang-Ryung Uh |
| 2003 | A Code Selection Method for SIMD Processors with PACK Instructions. | Hiroaki Tanaka, Shinsuke Kobayashi, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai |
| 2003 | Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. | Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor |
| 2003 | An Unfolding-Based Loop Optimization Technique. | Litong Song, Krishna M. Kavi, Ron Cytron |
| 2003 | Efficient Variable Allocation to Dual Memory Banks of DSPs. | Viera Sipkov |
| 2003 | Composable Code Generation for Model-Based Development. | Kirk Schloegel, David Oglesby, Eric Engstrom, Devesh Bhatt |
| 2003 | Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment. | V. V. N. S. Sarvani, R. Govindarajan |
| 2003 | Retargetable Graph-Coloring Register Allocation for Irregular Architectures. | Johan Runeson, Sven-Olof Nystrm |
| 2003 | Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation. | Yunheung Paek, Minwook Ahn, Soonho Lee |
| 2003 | Improving Offset Assignment through Simultaneous Variable Coalescing. | Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers |
| 2003 | Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation. | Sheayun Lee, Jaejin Lee, Sang Lyul Min, Jason Hiser, Jack W. Davidson |
| 2003 | Partitioning for DSP Software Synthesis. | Ming-Yung Ko, Shuvra S. Bhattacharyya |
| 2003 | Transformation of Meta-Information by Abstract Co-interpretation. | Raimund Kirner, Peter P. Puschner |