A bit-write reduction method based on error-correcting codes for non-volatile memories.
Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa
Browse the full ASPDAC paper archive.
Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa
Browse the full ASPDAC paper archive.