| 2025 | ASPDAC | Learned Image Codec on FPGA: Algorithm, Architecture and System Design. | Heming Sun, Jing Wang, Silu Liu, Shinji Kimura, Masahiro Fujita |
| 2025 | ICCAD | SOME: Symmetric One-Hot Matching Elector - A Lightweight Microsecond Decoder for Quantum Error Correction. | Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, Takashi Sato |
| 2023 | DCC | Compressed Input Data Format of Quantum Annealing Emulator. | Sohei Shimomai, Kei Ueda, Shinji Kimura |
| 2022 | ISCAS | Topology-Based Exact Synthesis for Majority Inverter Graph. | Xianliang Ge, Shinji Kimura |
| 2020 | ASPDAC | Small-Area and Low-Power FPGA-Based Multipliers using Approximate Elementary Modules. | Yi Guo, Heming Sun, Shinji Kimura |
| 2020 | Tencon | Accuracy-Configurable Low-Power Approximate Floating-Point Multiplier Based on Mantissa Bit Segmentation. | Jie Li, Yi Guo, Shinji Kimura |
| 2018 | ASPDAC | Sparse ternary connect: Convolutional neural networks using ternarized weights with enhanced sparsity. | Canran Jin, Heming Sun, Shinji Kimura |
| 2018 | ASPDAC | Quad-multiplier packing based on customized floating point for convolutional neural networks on FPGA. | Zhifeng Zhang, Dajiang Zhou, Shihao Wang, Shinji Kimura |
| 2018 | ISCAS | Embedded Frame Compression for Energy-Efficient Computer Vision Systems. | Li Guo, Dajiang Zhou, Jinjia Zhou, Shinji Kimura |
| 2018 | ISCAS | Sparseness Ratio Allocation and Neuron Re-pruning for Neural Networks Compression. | Li Guo, Dajiang Zhou, Jinjia Zhou, Shinji Kimura |
| 2018 | Tencon | Design of Power and Area Efficient Lower-Part-OR Approximate Multiplier. | Yi Guo, Heming Sun, Shinji Kimura |
| 2018 | Tencon | Energy-Efficient and High Performance Approximate Multiplier Using Compressors Based on Input Reordering. | Zhenhao Liu, Yi Guo, Xiaoting Sun, Shinji Kimura |
| 2017 | ISCAS | A low-cost approximate 32-point transform architecture. | Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita |
| 2017 | ISCAS | Effective write-reduction method for MLC non-volatile memory. | Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa |
| 2016 | ICCD | CNN-MERP: An FPGA-based memory-efficient reconfigurable processor for forward and backward propagation of convolutional neural networks. | Xushen Han, Dajiang Zhou, Shihao Wang, Shinji Kimura |
| 2015 | ASPDAC | A bit-write reduction method based on error-correcting codes for non-volatile memories. | Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa |
| 2015 | ISCAS | An independent bandwidth reduction device for HEVC VLSI video system. | Jiayi Zhu, Li Guo, Dajiang Zhou, Shinji Kimura, Satoshi Goto |
| 2015 | VCIP | Merge mode based fast inter prediction for HEVC. | Zhengxue Cheng, Heming Sun, Dajiang Zhou, Shinji Kimura |
| 2014 | ICIP | Fast SAO estimation algorithm and its VLSI architecture. | Jiayi Zhu, Dajiang Zhou, Shinji Kimura, Satoshi Goto |
| 2014 | VCIP | An area-efficient 4/8/16/32-point inverse DCT architecture for UHDTV HEVC decoder. | Heming Sun, Dajiang Zhou, Jiayi Zhu, Shinji Kimura, Satoshi Goto |
| 2013 | ISWC | Eyeglass-based hands-free videophone. | Shinji Kimura, Masaaki Fukumoto, Tsutomu Horikoshi |
| 2011 | ISLPED | Power and delay aware synthesis of multi-operand adders targeting LUT-based FPGAs. | Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga |
| 2010 | ASPDAC | Multi-operand adder synthesis on FPGAs using generalized parallel counters. | Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga |
| 2009 | CHI | An objective and subjective evaluation of an autostereoscopic 3d display. | Masashi Tsuboi, Shinji Kimura, Tsutomu Horikoshi |
| 2008 | ICCD | Synthesis of parallel prefix adders considering switching activities. | Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga |
| 2006 | ASPDAC | FCSCAN: an efficient multiscan-based test compression technique for test cost reduction. | Youhua Shi, Nozomu Togawa, Shinji Kimura, Masao Yanagisawa, Tatsuo Ohtsuki |
| 2006 | ASPDAC | Transition-based coverage estimation for symbolic model checking. | Xingwen Xu, Shinji Kimura, Kazunari Horikawa, Takehiko Tsuchiya |
| 2005 | MEMOCODE | Extended abstract: transition traversal coverage estimation for symbolic model checking. | Xingwen Xu, Shinji Kimura, Kazunari Horikawa, Takehiko Tsuchiya |
| 2004 | ASPDAC | Minimization of fractional wordlength on fixed-point conversion for high-level synthesis. | Nobuhiro Doi, Takashi Horiyama, Masaki Nakanishi, Shinji Kimura |
| 2002 | ICCAD | Folding of logic functions and its application to look up table compaction. | Shinji Kimura, Takashi Horiyama, Masaki Nakanishi, Hirotsugu Kajihara |
| 2001 | ASPDAC | A real-time 64-monosyllable recognition LSI with learning mechanism. | Kazuhiro Nakamura, Qiang Zhu, Shinji Maruoka, Takashi Horiyama, Shinji Kimura, Katsumasa Watanabe |
| 2001 | ASPDAC | Speech recognition chip for monosyllables. | Kazuhiro Nakamura, Qiang Zhu, Shinji Maruoka, Takashi Horiyama, Shinji Kimura, Katsumasa Watanabe |
| 2000 | ASPDAC | An application specific Java processor with reconfigurabilities. | Shinji Kimura, Hiroyuki Kida, Kazuyoshi Takagi, Tatsumori Abematsu, Katsumasa Watanabe |
| 2000 | ASPDAC | Multi-clock path analysis using propositional satisfiability. | Kazuhiro Nakamura, Shinji Maruoka, Shinji Kimura, Katsumasa Watanabe |
| 1998 | ICCAD | Waiting false path analysis of sequential logic circuits for performance optimization. | Kazuhiro Nakamura, Kazuyoshi Takagi, Shinji Kimura, Katsumasa Watanabe |
| 1995 | DAC | Residue BDD and Its Application to the Verification of Arithmetic Circuits. | Shinji Kimura |
| 1992 | ICCAD | Precise timing verification of logic circuits under combined delay model. | Shinji Kimura, Shigemi Kashima, Hiromasa Haneda |
| 1990 | ICCD | A parallel algorithm for constructing binary decision diagrams. | Shinji Kimura, Edmund M. Clarke |
| 1982 | DAC | An Interactive Simulation System for structured logic design - ISS. | Takeshi Sakai, Yoshiyuki Tsuchida, Hiroto Yasuura, Yasushi Ooi, Yoshitsugu Ono, Hiroshi Kano, Shinji Kimura, Shuzo Yajima |