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A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only).

Gerardo Soria Garca, Adrian Pedroza de-la-Crz, Susana Ortega-Cisneros, Juan Jos Raygoza-Panduro, Eduardo Bayro-Corrochano

VenueAFPGA
Year2015
ProceedingsFPGA

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