Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks.
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Browse the full FPGA paper archive.
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Browse the full FPGA paper archive.