| 2024 | HPCA | ECO-CHIP: Estimation of Carbon Footprint of Chiplet-based Architectures for Sustainable VLSI. | Chetan Choppali Sudarshan, Nikhil Matkar, Sarma B. K. Vrudhula, Sachin S. Sapatnekar, Vidya A. Chhabria |
| 2024 | IROS | Hardware-Software Co-Design for Path Planning by Drones. | Ayushi Dube, Omkar Patil, Gian Singh, Nakul Gopalan, Sarma B. K. Vrudhula |
| 2023 | HiPC | PARAG: PIM Architecture for Real-Time Acceleration of GCNs. | Gian Singh, Sanmukh R. Kuppannagari, Sarma B. K. Vrudhula |
| 2022 | DATE | A Flash-based Current-mode IC to Realize Quantized Neural Networks. | Kyler R. Scott, Cheng-Yen Lee, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2022 | ICCAD | Tunable Precision Control for Approximate Image Filtering in an In-Memory Architecture with Embedded Neurons. | Ayushi Dube, Ankit Wagle, Gian Singh, Sarma B. K. Vrudhula |
| 2021 | ICCD | CIDAN: Computing in DRAM with Artificial Neurons. | Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri |
| 2021 | SmartComp | Energy-Efficient Mapping for a Network of DNN Models at the Edge. | Mehdi Ghasemi, Soroush Heidari, Young Geun Kim, Aaron Lamb, Carole-Jean Wu, Sarma B. K. Vrudhula |
| 2020 | CVPR | Enabling Incremental Knowledge Transfer for Object Detection at the Edge. | Mohammad Farhadi, Mehdi Ghasemi, Sarma B. K. Vrudhula, Yezhou Yang |
| 2020 | ICCD | A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells. | Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2019 | FPGA | An Energy-Efficient FPGA Implementation of an LSTM Network Using Approximate Computing. | Elham Azari, Aykut Dengi, Sarma B. K. Vrudhula |
| 2019 | ICCAD | Embedding Binary Perceptrons in FPGA to improve Area, Power and Performance. | Ankit Wagle, Elham Azari, Sarma B. K. Vrudhula |
| 2019 | ICCD | Threshold Logic in a Flash. | Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula |
| 2018 | FPL | FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance, Power and Area. | Ankit Wagle, Jinghua Yang, Aykut Dengi, Sarma B. K. Vrudhula |
| 2018 | ICCAD | Algorithm-hardware co-design of single shot detector for fast object detection on FPGAs. | Yufei Ma, Tu Zheng, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo |
| 2018 | ISPASS | DORA: Optimizing Smartphone Energy Efficiency and Web Browser Performance under Interference. | Davesh Shingari, Akhil Arunkumar, Benjamin Gaudette, Sarma B. K. Vrudhula, Carole-Jean Wu |
| 2017 | DAC | A Clock Skewing Strategy to Reduce Power and Area of ASIC Circuits. | Niranjan Kulkarni, Aykut Dengi, Sarma B. K. Vrudhula |
| 2017 | FPGA | Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks. | Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo |
| 2017 | FPL | An automatic RTL compiler for high-throughput FPGA implementation of diverse deep convolutional neural networks. | Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo |
| 2017 | ISCAS | End-to-end scalable FPGA accelerator for deep residual networks. | Yufei Ma, Minkyu Kim, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo |
| 2016 | FPGA | Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks. | Naveen Suda, Vikas Chandra, Ganesh Dasika, Abinash Mohanty, Yufei Ma, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao |
| 2016 | FPL | Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. | Yufei Ma, Naveen Suda, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula |
| 2016 | HPCA | Improving smartphone user experience by balancing performance and energy with probabilistic QoS guarantee. | Benjamin Gaudette, Carole-Jean Wu, Sarma B. K. Vrudhula |
| 2016 | ISCAS | Demonstration of spike timing dependent plasticity in CBRAM devices with silicon neurons. | Debayan Mahalanabis, M. Sivaraj, W. Chen, S. Shah, Hugh J. Barnaby, Michael N. Kozicki, Jennifer Blain Christen, Sarma B. K. Vrudhula |
| 2016 | ISCAS | High-performance face detection with CPU-FPGA acceleration. | Abinash Mohanty, Naveen Suda, Minkyu Kim, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao |
| 2015 | DATE | Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip. | Pai-Yu Chen, Deepak Kadetotad, Zihan Xu, Abinash Mohanty, Binbin Lin, Jieping Ye, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu |
| 2015 | ICCAD | Mitigating Effects of Non-ideal Synaptic Device Characteristics for On-chip Learning. | Pai-Yu Chen, Binbin Lin, I-Ting Wang, Tuo-Hung Hou, Jieping Ye, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu |
| 2015 | ICCD | Energy-efficient reconstruction of compressively sensed bioelectrical signals with stochastic computing circuits. | Yufei Ma, Minkyu Kim, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula |
| 2015 | ISCAS | Design of threshold logic gates using emerging devices. | Sarma B. K. Vrudhula, Niranjan Kulkarni, Jinghua Yang |
| 2015 | ISCAS | Fast and robust differential flipflops and their extension to multi-input threshold gates. | Jinghua Yang, Niranjan Kulkarni, Joseph Davis, Sarma B. K. Vrudhula |
| 2014 | DAC | Branch-Aware Loop Mapping on CGRAs. | Mahdi Hamzeh, Aviral Shrivastava, Sarma B. K. Vrudhula |
| 2013 | DAC | REGIMap: register-aware application mapping on coarse-grained reconfigurable architectures (CGRAs). | Mahdi Hamzeh, Aviral Shrivastava, Sarma B. K. Vrudhula |
| 2012 | DAC | EPIMap: using epimorphism to map applications on CGRAs. | Mahdi Hamzeh, Aviral Shrivastava, Sarma B. K. Vrudhula |
| 2012 | ICCAD | Minimizing area and power of sequential CMOS circuits using threshold decomposition. | Niranjan Kulkarni, Nishant Nukala, Sarma B. K. Vrudhula |
| 2012 | INFOCOM | Optimal range assignment in solar powered active wireless sensor networks. | Benjamin Gaudette, Vinay Hanumaiah, Sarma B. K. Vrudhula, Marwan Krunz |
| 2011 | DATE | Reliability-aware thermal management for hard real-time applications on multi-core processors. | Vinay Hanumaiah, Sarma B. K. Vrudhula |
| 2011 | ICPP | Enabling Multithreading on CGRAs. | Aviral Shrivastava, Jared Pager, Reiley Jeyapaul, Mahdi Hamzeh, Sarma B. K. Vrudhula |
| 2009 | DAC | Throughput optimal task allocation under thermal constraints for multi-core processors. | Vinay Hanumaiah, Ravishankar Rao, Sarma B. K. Vrudhula, Karam S. Chatha |
| 2009 | DATE | Performance optimal speed control of multi-core processors under thermal constraints. | Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Chatha |
| 2009 | ICCAD | Maximizing performance of thermally constrained multi-core processors by dynamic voltage and frequency control. | Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Chatha |
| 2008 | ASPDAC | Decomposition based approach for synthesis of multi-level threshold logic circuits. | Tejaswi Gowda, Sarma B. K. Vrudhula |
| 2008 | DAC | Statistical waveform and current source based standard cell models for accurate timing analysis. | Amit Goel, Sarma B. K. Vrudhula |
| 2008 | DATE | Current source based standard cell model for accurate signal integrity and timing analysis. | Amit Goel, Sarma B. K. Vrudhula |
| 2008 | ICCAD | Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors. | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2008 | ISLPED | Analytical results for design space exploration of multi-core processors employing thread migration. | Ravishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski |
| 2008 | VLSID | Power Reduction of Functional Units Considering Temperature and Process Variations. | Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2008 | VLSID | Temperature and Process Variations Aware Power Gating of Functional Units. | Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2007 | CASES | Performance optimal processor throttling under thermal constraints. | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2007 | DAC | The Impact of NBTI on the Performance of Combinational and Sequential Circuits. | Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Rakesh Vattikonda, Sarma B. K. Vrudhula, Frank Liu, Yu Cao |
| 2007 | ISLPED | Throughput of multi-core processors under thermal constraints. | Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti |
| 2007 | VLSID | A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2007 | VLSID | Tutorial T6: Robust Design of Nanoscale Circuits in the Presence of Process Variations. | Sarma B. K. Vrudhula, Sarvesh Bhardwaj |
| 2006 | ASPDAC | Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage. | Sarvesh Bhardwaj, Yu Cao, Sarma B. K. Vrudhula |
| 2006 | DAC | Modeling of intra-die process variations for accurate analysis and optimization of nano-scale circuits. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Praveen Ghanta, Yu Cao |
| 2006 | DAC | High-level power management of embedded systems with application-specific energy cost functions. | Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Sarma B. K. Vrudhula |
| 2006 | DAC | Stochastic variational analysis of large power grids considering intra-die correlations. | Praveen Ghanta, Sarma B. K. Vrudhula, Sarvesh Bhardwaj, Rajendran Panda |
| 2006 | DAC | Extending the lifetime of fuel cell based hybrid systems. | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula |
| 2006 | ICCAD | A framework for statistical timing analysis using non-linear delay and slew models. | Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrudhula |
| 2006 | ISLPED | An optimal analytical solution for processor speed control with thermal constraints. | Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang |
| 2006 | ISLPED | Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids. | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula |
| 2005 | DAC | Leakage minimization of nano-scale circuits in the presence of systematic and random variations. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2005 | DAC | Energy optimal speed control of devices with discrete speed sets. | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2005 | DATE | Stochastic Power Grid Analysis Considering Process Variations. | Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang |
| 2005 | DSD | Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series. | Krzysztof S. Berezowski, Sarma B. K. Vrudhula |
| 2005 | ICCAD | Formalizing designer's preferences for multiattribute optimization with application to leakage-delay tradeoffs. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2005 | ICCAD | Battery optimization vs energy optimization: which to choose and when? | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2005 | MOBIHOC | Power balanced coverage-time optimization for clustered wireless sensor networks. | Tao Shu, Marwan Krunz, Sarma B. K. Vrudhula |
| 2004 | CASES | Disk drive energy optimization for audio-video applications. | Ravishankar Rao, Sarma B. K. Vrudhula, Musaravakkam S. Krishnan |
| 2004 | DAC | Variational delay metrics for interconnect timing analysis. | Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula |
| 2004 | DAC | Implicit pseudo boolean enumeration algorithms for input vector control. | Kaviraj Chopra, Sarma B. K. Vrudhula |
| 2004 | DAC | A methodology to improve timing yield in the presence of process variations. | Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wang |
| 2004 | DATE | A Framework for Battery-Aware Sensor Management. | Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan |
| 2004 | ICCAD | Energy optimization for a two-device data flow chain. | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2004 | ICCAD | Stochastic analysis of interconnect performance in the presence of process variations. | Janet Meiling Wang, Praveen Ghanta, Sarma B. K. Vrudhula |
| 2004 | VLSID | Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic. | Kaviraj Chopra, Sarma B. K. Vrudhula, Sarvesh Bhardwaj |
| 2004 | VLSID | Energy Profiler for Hardware/Software Co-Design. | Raghukiran Sreeramaneni, Sarma B. K. Vrudhula |
| 2003 | DAC | Computation and Refinement of Statistical Bounds on Circuit Delay. | Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula |
| 2003 | DATE | Statistical Timing Analysis Using Bounds. | Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula |
| 2003 | ICCAD | AU: Timing Analysis Under Uncertainty. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula, David T. Blaauw |
| 2003 | ISLPED | Analysis of discharge techniques for multiple battery systems. | Ravishankar Rao, Sarma B. K. Vrudhula, Daler N. Rakhmatov |
| 2002 | DAC | Battery-conscious task sequencing for portable devices including voltage/clock scaling. | Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti |
| 2002 | DAC | Estimation of the likelihood of capacitive coupling noise. | Sarma B. K. Vrudhula, David T. Blaauw, Supamas Sirichotiyakul |
| 2002 | ICCAD | Estimation of signal arrival times in the presence of delay noise. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula, David T. Blaauw |
| 2002 | ISLPED | Battery lifetime prediction for energy-aware computing. | Daler N. Rakhmatov, Sarma B. K. Vrudhula, Deborah A. Wallach |
| 2001 | ICCAD | An Analytical High-Level Battery Model for Use in Energy Management of Portable Electronic Systems. | Daler N. Rakhmatov, Sarma B. K. Vrudhula |
| 2001 | ISLPED | Time-to-failure estimation for batteries in portable electronic systems. | Daler N. Rakhmatov, Sarma B. K. Vrudhula |
| 1999 | ICCD | An Investigation of Power Delay Tradeoffs for Dual Vt CMOS Circuits. | Qi Wang, Sarma B. K. Vrudhula |
| 1998 | DATE | Data Driven Power Optimization of Sequential Circuits. | Qi Wang, Sarma B. K. Vrudhula |
| 1998 | ICCAD | Static power optimization of deep submicron CMOS circuits for dual VT technology. | Qi Wang, Sarma B. K. Vrudhula |
| 1998 | ICCD | On short circuit power estimation of CMOS inverters. | Qi Wang, Sarma B. K. Vrudhula |
| 1997 | DAC | An Investigation of Power Delay Trade-Offs on PowerPC Circuits. | Qi Wang, Sarma B. K. Vrudhula, Shantanu Ganguly |
| 1997 | RSP | Macro-instruction generation for dynamic logic caching. | K. McCarley, Sarma B. K. Vrudhula |
| 1997 | RSP | Rapid prototyping of networks of asynchronous multiple functional units. | E. Tsun, Sarma B. K. Vrudhula |
| 1996 | ICCAD | Multi-level logic optimization for low power using local logic transformations. | Qi Wang, Sarma B. K. Vrudhula |
| 1993 | DAC | BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis. | Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula |
| 1993 | ICCAD | FGILP: an integer linear program solver based on function graphs. | Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula |