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Paper
Tutorial T6: Robust Design of Nanoscale Circuits in the Presence of Process Variations.
Sarma B. K. Vrudhula
,
Sarvesh Bhardwaj
Venue
National
VLSID
Year
2007
Proceedings
VLSI Design
DBLP record
conf/vlsid/VrudhulaB07 ↗
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